{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T17:17:48Z","timestamp":1729617468563,"version":"3.28.0"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,2]]},"DOI":"10.1109\/isscc.2010.5433911","type":"proceedings-article","created":{"date-parts":[[2010,3,24]],"date-time":"2010-03-24T10:35:14Z","timestamp":1269426914000},"page":"268-269","source":"Crossref","is-referenced-by-count":25,"title":["A 90nm 4Mb embedded phase-change memory with 1.2V 12ns read access time and 1MB\/s write throughput"],"prefix":"10.1109","author":[{"given":"Guid","family":"De Sandre","sequence":"first","affiliation":[]},{"given":"Luca","family":"Bettini","sequence":"additional","affiliation":[]},{"given":"Alessandro","family":"Pirola","sequence":"additional","affiliation":[]},{"given":"Lionel","family":"Marmonier","sequence":"additional","affiliation":[]},{"given":"Marco","family":"Pasotti","sequence":"additional","affiliation":[]},{"given":"Massimo","family":"Borghi","sequence":"additional","affiliation":[]},{"given":"Paolo","family":"Mattavelli","sequence":"additional","affiliation":[]},{"given":"Paola","family":"Zuliani","sequence":"additional","affiliation":[]},{"given":"Luca","family":"Scotti","sequence":"additional","affiliation":[]},{"given":"Gianfranco","family":"Mastracchio","sequence":"additional","affiliation":[]},{"given":"Ferdinando","family":"Bedeschi","sequence":"additional","affiliation":[]},{"given":"Roberto","family":"Gastaldi","sequence":"additional","affiliation":[]},{"given":"Roberto","family":"Bez","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2008.4681826"},{"key":"ref3","first-page":"474","article-title":"A 512kB Embedded Phase Change Memory with 416kB\/s Write Throughput at 100mA Cell Write Current","author":"hanzawa","year":"2007","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/NVMT.2009.5429783"},{"key":"ref5","first-page":"428","article-title":"A Multi-Level-Cell Bipolar-Selected Phase-Change Memory","author":"bedeschi","year":"2008","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2006.1705247"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"877","DOI":"10.1109\/JSSC.2005.845564","article-title":"A 130-nm 0.9-V 66-MHz 8-Mb $(256{\\rm K}\\times 32)$ local SONOS Embedded Flash EEPROM","volume":"40","author":"seo","year":"2005","journal-title":"J Solid State Circuits"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2009.5424413"}],"event":{"name":"2010 IEEE International Solid- State Circuits Conference - (ISSCC)","start":{"date-parts":[[2010,2,7]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2010,2,11]]}},"container-title":["2010 IEEE International Solid-State Circuits Conference - (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5428240\/5433812\/05433911.pdf?arnumber=5433911","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T02:30:08Z","timestamp":1497839408000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5433911\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,2]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/isscc.2010.5433911","relation":{},"subject":[],"published":{"date-parts":[[2010,2]]}}}