{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T07:25:57Z","timestamp":1730273157434,"version":"3.28.0"},"reference-count":13,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,10,16]],"date-time":"2023-10-16T00:00:00Z","timestamp":1697414400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,10,16]],"date-time":"2023-10-16T00:00:00Z","timestamp":1697414400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,10,16]]},"DOI":"10.1109\/iscit57293.2023.10376105","type":"proceedings-article","created":{"date-parts":[[2024,1,3]],"date-time":"2024-01-03T19:26:53Z","timestamp":1704310013000},"page":"407-412","source":"Crossref","is-referenced-by-count":1,"title":["Effect of High Frequency Noise Using DCMs in FPGA on Power Analysis Attack"],"prefix":"10.1109","author":[{"given":"Tomoaki","family":"Ukezono","sequence":"first","affiliation":[{"name":"Fukuoka University,Dept. of EECS,Fukuoka City,Japan"}]},{"given":"Yui","family":"Koyanagi","sequence":"additional","affiliation":[{"name":"Fukuoka University,Graduate School of Engineering,Fukuoka City,Japan"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-48405-1_25"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-45664-3_18"},{"key":"ref3","first-page":"271","article-title":"Breaking Cryptographic Implementations Using Deep Learning Techniques","volume-title":"Proc. of 6th International Conference on Security, Privacy, and Applied Cryptography Engineering (SPACE 2016), Lecture Notes in Computer Science","volume":"10076","author":"Houssem"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-28632-5_2"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1268856"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/11545262_26"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/11545262_13"},{"key":"ref8","article-title":"Combinational Logic Design for AES SubByte Transformation on Masked Data","author":"Trichina","year":"2003","journal-title":"Cryptology ePrint Archive, 2003\/236"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/11935308_38"},{"journal-title":"User Guide, UG382 (v1.10)","article-title":"Spartan-6 FPGA Clocking Resources","year":"2015","key":"ref10"},{"article-title":"Side-Channel Power Analysis of AES Core in Project Vault","year":"2023","author":"OFlynn","key":"ref11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.18637\/jss.v008.i14"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-10175-0_17"}],"event":{"name":"2023 22nd International Symposium on Communications and Information Technologies (ISCIT)","start":{"date-parts":[[2023,10,16]]},"location":"Sydney, Australia","end":{"date-parts":[[2023,10,18]]}},"container-title":["2023 22nd International Symposium on Communications and Information Technologies (ISCIT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10376047\/10376048\/10376105.pdf?arnumber=10376105","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,24]],"date-time":"2024-01-24T04:37:19Z","timestamp":1706071039000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10376105\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,10,16]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/iscit57293.2023.10376105","relation":{},"subject":[],"published":{"date-parts":[[2023,10,16]]}}}