{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,6]],"date-time":"2024-08-06T05:39:07Z","timestamp":1722922747540},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iscas.1994.409304","type":"proceedings-article","created":{"date-parts":[[2002,12,17]],"date-time":"2002-12-17T14:12:23Z","timestamp":1040134343000},"page":"77-80","source":"Crossref","is-referenced-by-count":8,"title":["A case study of mixed-signal integrated circuit testing: an application of current testing using the upper limit and the lower limit"],"prefix":"10.1109","volume":"5","author":[{"given":"Y.","family":"Miura","sequence":"first","affiliation":[]},{"given":"S.","family":"Naito","sequence":"additional","affiliation":[]},{"given":"K.","family":"Kinoshita","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1990.114052"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1992.527913"},{"journal-title":"An Approach for Mixed-Signal Integral Circuits Testing A Fault Analysis and A Testing Method","year":"1993","author":"miura","key":"ref12"},{"journal-title":"Principles of CMOS VLSI Design A Systems Perspective","year":"1985","author":"weste","key":"ref13"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"173","DOI":"10.1145\/37888.37914","article-title":"realistic fault modeling for vlsi testing","author":"maly","year":"1987","journal-title":"24th ACM\/IEEE Design Automation Conference"},{"key":"ref15","first-page":"148","article-title":"Modeling of Spot Defects in MOS Transistors","author":"syrzycki","year":"1987","journal-title":"Proc Int Test Conf"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1988.207759"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1980.1675614"},{"key":"ref4","first-page":"818","article-title":"Testing A\/D Converters on Microcomputers","author":"browning","year":"1985","journal-title":"Proc Int Test Conf"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1992.527851"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1990.114015"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/19.65789"},{"key":"ref8","first-page":"312","article-title":"Test Generation and Concurrent Error Detection in Current-Mode A\/D Converters","author":"krishnan","year":"1992","journal-title":"Proc Int Test Conf"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1991.519719"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/41.19073"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/41.19072"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1988.122524"}],"event":{"name":"IEEE International Symposium on Circuits and Systems - ISCAS '94","acronym":"ISCAS-94","location":"London, UK"},"container-title":["Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx2\/3224\/9173\/00409304.pdf?arnumber=409304","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T12:30:06Z","timestamp":1497529806000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/409304\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/iscas.1994.409304","relation":{},"subject":[]}}