{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T06:38:23Z","timestamp":1725345503629},"reference-count":30,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/isca.2003.1206984","type":"proceedings-article","created":{"date-parts":[[2004,3,22]],"date-time":"2004-03-22T14:34:28Z","timestamp":1079966068000},"source":"Crossref","is-referenced-by-count":12,"title":["Temperature-aware microarchitecture"],"prefix":"10.1109","author":[{"given":"K.","family":"Skadron","sequence":"first","affiliation":[]},{"given":"M.R.","family":"Stan","sequence":"additional","affiliation":[]},{"given":"W.","family":"Huang","sequence":"additional","affiliation":[]},{"family":"Sivakumar Velusamy","sequence":"additional","affiliation":[]},{"family":"Karthik Sankaranarayanan","sequence":"additional","affiliation":[]},{"given":"D.","family":"Tarjan","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref30","article-title":"Hotleakage: A temperature-aware model of subthreshold and gate leakage for architects","author":"zhang","year":"2003","journal-title":"Tech Report CS-2003-05"},{"key":"ref10","article-title":"Crusoe power management: Cutting x86 operating power through LongRun","author":"fleischmann","year":"2000","journal-title":"Embedded Processor Forum"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2001.922260"},{"key":"ref12","article-title":"Managing the impact of increasing microprocessor power consumption","author":"gunther","year":"2001","journal-title":"J Intel Tech"},{"key":"ref13","first-page":"202","article-title":"A framework for dynamic energy efficiency and temperature management","author":"huang","year":"2000","journal-title":"Proc MICRO-33"},{"key":"ref14","first-page":"2.1","article-title":"Thermal management","author":"krum","year":"2000","journal-title":"The CRC Handbook of Thermal Engineering"},{"key":"ref15","first-page":"199","article-title":"Constricting\/spreading resistance model for electronics packaging","author":"lee","year":"1995","journal-title":"Proc AJTEC"},{"key":"ref16","first-page":"517","article-title":"A thermal-aware superscalar microprocessor","author":"lim","year":"2002","journal-title":"Proc ISQED"},{"key":"ref17","article-title":"Thermal management of CPUs: A perspective on trends, needs and opportunities","author":"mahajan","year":"2002","journal-title":"Keynote presentation THERMINIC-8"},{"key":"ref18","first-page":"132","article-title":"Pipeline gating: speculation control for energy reduction","author":"manne","year":"1998","journal-title":"Proc ISCA-25"},{"key":"ref19","author":"rabaey","year":"1995","journal-title":"Digital Integrated Circuits A Design Perspective"},{"key":"ref28","article-title":"Adaptive cache decay using formal feedback control","author":"velusamy","year":"2002","journal-title":"Proceedings of WMPI"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2001.903261"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859620"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/40.782564"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/268806.268810"},{"key":"ref29","article-title":"Thermal performance challenges from silicon to systems","author":"viswanath","year":"2000","journal-title":"J Intel Tech"},{"key":"ref5","first-page":"83","article-title":"Wattch: a framework for architectural-level power analysis and optimizations","author":"brooks","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"key":"ref8","year":"0","journal-title":"Compaq 21364 die photo From website CPU Info Center"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.1999.807517"},{"key":"ref2","author":"bannon","year":"2002","journal-title":"Personal communication"},{"key":"ref9","article-title":"TEM-PEST: A thermal enabled multi-model power\/performance estimator","author":"dhodapkar","year":"2000","journal-title":"Proc PACS"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3190-3"},{"key":"ref20","article-title":"Dynamically managing processor temperature and power","author":"rohou","year":"1999","journal-title":"Proc FDDO-2"},{"key":"ref22","first-page":"325","article-title":"Thermal management system for highperformance PowerPC microprocessors","author":"sanchez","year":"1997","journal-title":"Proc COMP-CON"},{"key":"ref21","article-title":"Dynamic compact thermal models: An overview of current and potential advances","author":"sabry","year":"2002","journal-title":"Proc THERMINIC 8"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2001.953283"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2002.995696"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2002.995695"},{"key":"ref25","year":"2001","journal-title":"SIA International Technology Roadmap for Semiconductors"}],"event":{"name":"ISCA 2003: 30th International Symposium on Computer Architecture","location":"San Diego, CA, USA","acronym":"ISCA-03"},"container-title":["30th Annual International Symposium on Computer Architecture, 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8578\/27165\/01206984.pdf?arnumber=1206984","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T17:08:24Z","timestamp":1489424904000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1206984\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/isca.2003.1206984","relation":{},"subject":[]}}