{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T14:47:39Z","timestamp":1725634059139},"reference-count":8,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,6]]},"DOI":"10.1109\/icicdt.2019.8790841","type":"proceedings-article","created":{"date-parts":[[2019,8,8]],"date-time":"2019-08-08T19:25:46Z","timestamp":1565292346000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["Tile Buffer Design for Linear-U Data Layout in Embedded GPU"],"prefix":"10.1109","author":[{"given":"Li","family":"Jiayun","sequence":"first","affiliation":[{"name":"School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Xi’an, China"}]},{"given":"Du","family":"Huimin","sequence":"additional","affiliation":[{"name":"School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Xi’an, China"}]}],"member":"263","reference":[{"journal-title":"State-of-the-Art Survey of Real-Time Multicore System[J\/OL]","year":"0","author":"chen","key":"ref4"},{"journal-title":"Researche and Design of a Tile-based Embedded GPU[D]","year":"2014","author":"jia","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2015.71"},{"journal-title":"An Area and Bandwidth Efficient Programmable Shader Architecture for Embedded Graphics Processing Units[D]","year":"2013","author":"yi-song","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICIS.2016.7550744"},{"journal-title":"ICEMI","article-title":"Memory layout method for image processing embedded system[C]","year":"2005","author":"li","key":"ref7"},{"journal-title":"The design of Tile-Based graphics processing and high quality algorithms in 3D rendering[D]","year":"2012","author":"yue","key":"ref2"},{"journal-title":"Researches on the Key Technologies of the Low Power High Performance Mobile 3D Graphics Vertex Processor Design[D]","year":"2013","author":"ji-ye","key":"ref1"}],"event":{"name":"2019 International Conference on IC Design and Technology (ICICDT)","start":{"date-parts":[[2019,6,17]]},"location":"Suzhou, China","end":{"date-parts":[[2019,6,19]]}},"container-title":["2019 International Conference on IC Design and Technology (ICICDT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8784132\/8790825\/08790841.pdf?arnumber=8790841","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,3,27]],"date-time":"2023-03-27T14:33:56Z","timestamp":1679927636000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8790841\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,6]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/icicdt.2019.8790841","relation":{},"subject":[],"published":{"date-parts":[[2019,6]]}}}