{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T04:26:30Z","timestamp":1729657590000,"version":"3.28.0"},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,10]]},"DOI":"10.1109\/iccd.2008.4751887","type":"proceedings-article","created":{"date-parts":[[2009,1,20]],"date-time":"2009-01-20T15:27:15Z","timestamp":1232465235000},"page":"371-376","source":"Crossref","is-referenced-by-count":9,"title":["Exploiting spare resources of in-order SMT processors executing hard real-time threads"],"prefix":"10.1109","author":[{"given":"Jorg","family":"Mische","sequence":"first","affiliation":[]},{"given":"Sascha","family":"Uhrig","sequence":"additional","affiliation":[]},{"given":"Florian","family":"Kluge","sequence":"additional","affiliation":[]},{"given":"Theo","family":"Ungerer","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"WCET Bechmarks","year":"0","key":"17"},{"year":"0","key":"18"},{"year":"0","key":"15"},{"journal-title":"AutoBench 1 1 Software Benchmark Data Book","year":"0","key":"16"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1145\/859658.859659"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/ISSPIT.2005.1577063"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1145\/1288940.1288974"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/1086297.1086326"},{"key":"3","first-page":"134","article-title":"soft real-time scheduling on simultaneous multithreaded processors","author":"jain","year":"2002","journal-title":"Proc RTSS'02"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2002.1105971"},{"journal-title":"Proc of the 1999 Workshop on Multithreaded Execution Architecture and Compilation","article-title":"applications of thread prioritization in smt processors","year":"1999","author":"raasch","key":"1"},{"year":"0","key":"10"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.1999.744331"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-78153-0_13"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2007.28"},{"key":"4","doi-asserted-by":"crossref","first-page":"433","DOI":"10.1145\/977091.977152","article-title":"predictable performance in smt processors","author":"cazorla","year":"2004","journal-title":"Proc of the 1st Conference on Computing Frontiers"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/RTCSA.2000.896384"},{"key":"8","first-page":"539","article-title":"an in-order smt architecture with static resource partitoning for consumer applications parallel and distributed computing: applications and technologies","volume":"3320","author":"moon","year":"2004","journal-title":"LXCS"}],"event":{"name":"2008 IEEE International Conference on Computer Design (ICCD)","start":{"date-parts":[[2008,10,12]]},"location":"Lake Tahoe, CA, USA","end":{"date-parts":[[2008,10,15]]}},"container-title":["2008 IEEE International Conference on Computer Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4740204\/4751825\/04751887.pdf?arnumber=4751887","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T11:56:33Z","timestamp":1497786993000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4751887\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,10]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/iccd.2008.4751887","relation":{},"subject":[],"published":{"date-parts":[[2008,10]]}}}