{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T02:48:49Z","timestamp":1725763729050},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iccad.2001.968667","type":"proceedings-article","created":{"date-parts":[[2002,11,13]],"date-time":"2002-11-13T22:16:03Z","timestamp":1037225763000},"page":"439-442","source":"Crossref","is-referenced-by-count":17,"title":["BOOM-a heuristic Boolean minimizer"],"prefix":"10.1109","author":[{"given":"J.","family":"Hlavicka","sequence":"first","affiliation":[]},{"given":"P.","family":"Fiser","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/37888.37985"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1987.1270318"},{"journal-title":"Logic synthesis for VLSI design","year":"1989","author":"rudell","key":"ref12"},{"year":"0","key":"ref13"},{"year":"0","key":"ref14"},{"year":"0","key":"ref15"},{"journal-title":"Logic Minimization Algorithms for VLSI Synthesis","first-page":"192","year":"1984","author":"brayton","key":"ref4"},{"key":"ref3","first-page":"283","article-title":"A Heuristic method of two-level logic synthesis","author":"hlavi\u0161ka","year":"2001","journal-title":"5th World Multiconf Systemics Cybernetics and Informatics SCI 2001"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/0167-9260(94)00007-7"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1992.227866"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1956.tb03835.x"},{"journal-title":"Logic Synthesis and Verification Algorithms","first-page":"564","year":"1996","author":"hachtel","key":"ref7"},{"key":"ref2","first-page":"291","article-title":"Implicant Expansion Method used in the BOOM Minimizer","author":"fi\u0161er","year":"2001","journal-title":"Proc of IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS)"},{"key":"ref1","first-page":"91","article-title":"Efficient Minimization Method for Incompletely Defined Boolean Functions","author":"fi\u0161er","year":"2000","journal-title":"Proceedings of the International Workshop on Boolean Problems"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"618","DOI":"10.1145\/157485.165069","article-title":"espresso-signature: a new exact minimizer for logic functions","author":"mcgeer","year":"1993","journal-title":"30th ACM\/IEEE Design Automation Conference"}],"event":{"name":"IEEE\/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE\/ACM Digest of Technical Papers","acronym":"ICCAD-01","location":"San Jose, CA, USA"},"container-title":["IEEE\/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE\/ACM Digest of Technical Papers (Cat. No.01CH37281)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/7652\/20895\/00968667.pdf?arnumber=968667","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T14:59:58Z","timestamp":1497538798000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/968667\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/iccad.2001.968667","relation":{},"subject":[]}}