{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T17:48:01Z","timestamp":1725385681627},"reference-count":13,"publisher":"IEEE Comput. Soc. Press","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/iccad.1988.122513","type":"proceedings-article","created":{"date-parts":[[2003,1,6]],"date-time":"2003-01-06T14:03:04Z","timestamp":1041861784000},"page":"290-293","source":"Crossref","is-referenced-by-count":10,"title":["Boolean decomposition in multi-level logic optimization"],"prefix":"10.1109","author":[{"given":"S.","family":"Devadas","sequence":"first","affiliation":[]},{"given":"A.R.","family":"Wang","sequence":"additional","affiliation":[]},{"given":"A.R.","family":"Newton","sequence":"additional","affiliation":[]},{"given":"A.","family":"Sangiovanni-Vincentelli","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Proc Int Symp Circuits Systems","article-title":"The yorktown silicon compiler","year":"1985","author":"brayton","key":"ref10"},{"journal-title":"Automated synthesis of multi-level combinational logic in cmos technology","year":"1985","author":"hofmann","key":"ref11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1986.1270230"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1987.1270318"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1988.20787"},{"journal-title":"Proc Int Symp Circ Syst (ISCAS-82)","article-title":"The decomposition and facorization of boolean expressions","year":"1982","author":"brayton","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1985.1270123"},{"journal-title":"Proc of Int'l Conference on Computer-Aided Design","article-title":"The boulder optimal logic design system","year":"1987","author":"bostick","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1147\/rd.285.0537"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1147\/rd.254.0272"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1987.1270347"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1986.1270229"},{"journal-title":"Int Conf Computer Design VLSI in Computers","article-title":"Multi-level logic minimization using im plicit don't cares","year":"1986","author":"bartlett","key":"ref9"}],"event":{"name":"[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers","location":"Santa Clara, CA, USA"},"container-title":["[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx2\/212\/3483\/00122513.pdf?arnumber=122513","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,8]],"date-time":"2017-03-08T16:41:21Z","timestamp":1488991281000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/122513\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/iccad.1988.122513","relation":{},"subject":[]}}