乐胖代购免代理版

{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T11:36:47Z","timestamp":1725709007012},"reference-count":68,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T00:00:00Z","timestamp":1648771200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T00:00:00Z","timestamp":1648771200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100004358","name":"Samsung","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100004358","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003725","name":"National Research Foundation of Korea","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,4]]},"DOI":"10.1109\/hpca53966.2022.00084","type":"proceedings-article","created":{"date-parts":[[2022,5,17]],"date-time":"2022-05-17T15:50:17Z","timestamp":1652802617000},"page":"1100-1114","source":"Crossref","is-referenced-by-count":3,"title":["Exploiting Inter-block Entropy to Enhance the Compressibility of Blocks with Diverse Data"],"prefix":"10.1109","author":[{"given":"Jinkwon","family":"Kim","sequence":"first","affiliation":[{"name":"School of Computing KAIST"}]},{"given":"Mincheol","family":"Kang","sequence":"additional","affiliation":[{"name":"School of Computing KAIST"}]},{"given":"Jeongkyu","family":"Hong","sequence":"additional","affiliation":[{"name":"Yeungnam University,Department of Computer Engineering"}]},{"given":"Soontae","family":"Kim","sequence":"additional","affiliation":[{"name":"School of Computing KAIST"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.1999.744314"},{"key":"ref38","first-page":"101","article-title":"The case for compressed caching in virtual memory systems","author":"wilson","year":"1999","journal-title":"USENIX Annual Technical Conference General Track"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/1186736.1186737"},{"key":"ref32","first-page":"1","article-title":"Understanding the heap by breaking it","author":"ferguson","year":"2007","journal-title":"Black Hat USA"},{"article-title":"A memory allocator","year":"1996","author":"lea","key":"ref31"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-60368-9_19"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.6"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253201"},{"key":"ref35","article-title":"The gap benchmark suite","author":"beamer","year":"2015","journal-title":"arXiv preprint arXiv 1508 03619"},{"year":"0","key":"ref34","article-title":"Spec cpu2017"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2020.3010062"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1145\/3243176.3243182"},{"key":"ref61","doi-asserted-by":"crossref","DOI":"10.23919\/DATE54114.2022.9774545","article-title":"Encore compression: Exploiting narrow-width values for quantized deep neural networks","author":"jang","year":"2022","journal-title":"2022 Design Automation & Test in Europe Conference & Exhibition (DATE)"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155670"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771792"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1145\/2807591.2807659"},{"key":"ref27","first-page":"295","article-title":"Adaptive granularity memory systems: A tradeoff between storage efficiency and throughput","author":"doe hyun yoon","year":"2011","journal-title":"2011 38th Annual International Symposium on Computer Architecture (ISCA) ISCA"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1145\/1542275.1542288"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2000.898076"},{"journal-title":"Understanding the Linux Virtual Memory Manager","year":"2004","author":"gorman","key":"ref29"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2014.6853231"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2016.7783704"},{"key":"ref2","article-title":"Jesd79-4","author":"standard","year":"2012","journal-title":"Joint Electron Device Engineering Council"},{"key":"ref1","first-page":"1","article-title":"Jesd79-3d","author":"standard","year":"2009","journal-title":"Revision of JESD79-3C"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2808233"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2017.35"},{"key":"ref21","first-page":"172","article-title":"Linearly Compressed Pages: A Low-Complexity, Low-Latency Main Memory Compression Framework","author":"gennady pekhimenko","year":"2013","journal-title":"2013 46th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO)"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2525994"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522304"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2012.6237047"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2488282"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105405"},{"year":"0","key":"ref51","article-title":"Synopsys"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830823"},{"key":"ref58","article-title":"Intel 64 and ia-32 architectures optimization reference manual","author":"intel","year":"2014","journal-title":"Intel Corporation"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2014.07.003"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1145\/378993.379244"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.864128"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1145\/3457207"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1145\/1394608.1382159"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2018.2821163"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2016.37"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3240302.3240429"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2014.2366743"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3297858.3304006"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2597652.2597655"},{"journal-title":"Bcd deduplication Effective memory compression using partial cache-line deduplication","year":"0","author":"park","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116279"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/2248487.2151007"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/2830772.2830828"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3373376.3378518"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00051"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2019.00010"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555801"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835972"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00034"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2020989"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"377","DOI":"10.1145\/2370816.2370870","article-title":"Base-Delta-Immediate Compression: Practical Data Compression for On-Chip Caches","author":"gennady pekhimenko","year":"2012","journal-title":"In International Conference on Parallel Architectures and Compilation Techniques (PACT)"},{"journal-title":"DDR3 SDRAM System-Power Calculator","year":"0","author":"technology","key":"ref49"},{"key":"ref9","article-title":"Frequent pattern compression: A significance-based compression scheme for l2 caches","author":"alameldeen","year":"2004","journal-title":"University of Wisconsin-Madison Computer Sciences Department Tech Report"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2018.00014"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA47549.2020.00060"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2414456"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1145\/1064978.1065034"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/DCC.2007.44"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/3138805"},{"article-title":"Amd64 architecture programmer’s manual volume 2: System programming","year":"2006","author":"devices","key":"ref44"},{"key":"ref43","article-title":"Gnu compiler collection internals","author":"stallman","year":"2002","journal-title":"Free Software Foundation"}],"event":{"name":"2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)","start":{"date-parts":[[2022,4,2]]},"location":"Seoul, Korea, Republic of","end":{"date-parts":[[2022,4,6]]}},"container-title":["2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9773179\/9773180\/09773200.pdf?arnumber=9773200","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,2,5]],"date-time":"2023-02-05T06:57:02Z","timestamp":1675580222000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9773200\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,4]]},"references-count":68,"URL":"https:\/\/doi.org\/10.1109\/hpca53966.2022.00084","relation":{},"subject":[],"published":{"date-parts":[[2022,4]]}}}