{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T10:31:28Z","timestamp":1725532288649},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,9]]},"DOI":"10.1109\/fdl.2008.4641417","type":"proceedings-article","created":{"date-parts":[[2008,10,14]],"date-time":"2008-10-14T19:14:34Z","timestamp":1224011674000},"page":"31-36","source":"Crossref","is-referenced-by-count":1,"title":["Towards a common HW\/SW interface-centric and component-oriented specification and design methodology"],"prefix":"10.1109","author":[{"given":"G.","family":"Gailliard","sequence":"first","affiliation":[]},{"given":"H.","family":"Balp","sequence":"additional","affiliation":[]},{"given":"C.","family":"Jouvray","sequence":"additional","affiliation":[]},{"given":"F.","family":"Verdier","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Proc Conference on Design Automation (DAC'99)","article-title":"description and simulation of hardware\/software systems with java","year":"1999","author":"kuhn","key":"3"},{"journal-title":"Synthesis of Digital Circuits from Object-Oriented Specifications","year":"2000","author":"radetzki","key":"2"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403455"},{"journal-title":"Object-Oriented Development for Recon figurable Architectures","year":"2006","author":"fro?hlich","key":"1"},{"year":"0","key":"7"},{"article-title":"a methodology and algorithms for efficient synthesis from system description in sdl","year":"1997","author":"kumar","key":"6"},{"journal-title":"Library for Synthesisable System Level Models in SystemC","year":"2007","author":"osss","key":"5"},{"journal-title":"Proc of IP-Based SoC Design Conference","article-title":"light-weight communication infrastructure for ip integration","year":"2006","author":"barba","key":"4"},{"year":"0","key":"9"},{"year":"0","key":"8"},{"year":"0","key":"11"}],"event":{"name":"2008 Forum on Specification, Verification & Design Languages (FDL)","start":{"date-parts":[[2008,9,23]]},"location":"Stuttgart, Germany","end":{"date-parts":[[2008,9,25]]}},"container-title":["2008 Forum on Specification, Verification and Design Languages"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4636106\/4641405\/04641417.pdf?arnumber=4641417","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,3,19]],"date-time":"2021-03-19T20:32:42Z","timestamp":1616185962000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/4641417\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,9]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/fdl.2008.4641417","relation":{},"subject":[],"published":{"date-parts":[[2008,9]]}}}