{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T23:53:45Z","timestamp":1725666825952},"reference-count":6,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,9,1]],"date-time":"2020-09-01T00:00:00Z","timestamp":1598918400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,9,1]],"date-time":"2020-09-01T00:00:00Z","timestamp":1598918400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,9,1]],"date-time":"2020-09-01T00:00:00Z","timestamp":1598918400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,9]]},"DOI":"10.1109\/ewdts50664.2020.9224705","type":"proceedings-article","created":{"date-parts":[[2020,10,15]],"date-time":"2020-10-15T20:00:47Z","timestamp":1602792047000},"page":"1-5","source":"Crossref","is-referenced-by-count":3,"title":["Increasing Self-Timed Circuit Soft Error Tolerance"],"prefix":"10.1109","author":[{"given":"Igor","family":"Sokolov","sequence":"first","affiliation":[]},{"given":"Yury","family":"Stepchenkov","sequence":"additional","affiliation":[]},{"given":"Yury","family":"Diachenko","sequence":"additional","affiliation":[]},{"given":"Yury","family":"Rogdestvenski","sequence":"additional","affiliation":[]},{"given":"Denis","family":"Diachenko","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/EWDTS.2019.8884401"},{"key":"ref3","first-page":"204","article-title":"A theory of asynchronous circuits","author":"muller","year":"1959","journal-title":"Proc Int Symp Theory Switching"},{"article-title":"Single event upset immune logic family","year":"2004","author":"eaton","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/RADECS.2016.8093145"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/RELPHY.2007.369907"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DESSERT.2019.8770047"}],"event":{"name":"2020 IEEE East-West Design & Test Symposium (EWDTS)","start":{"date-parts":[[2020,9,4]]},"location":"Varna, Bulgaria","end":{"date-parts":[[2020,9,7]]}},"container-title":["2020 IEEE East-West Design & Test Symposium (EWDTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9220087\/9224633\/09224705.pdf?arnumber=9224705","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,27]],"date-time":"2022-06-27T16:06:10Z","timestamp":1656345970000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9224705\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,9]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/ewdts50664.2020.9224705","relation":{},"subject":[],"published":{"date-parts":[[2020,9]]}}}