{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:52:28Z","timestamp":1729662748468,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,8]]},"DOI":"10.1109\/dsd.2009.237","type":"proceedings-article","created":{"date-parts":[[2009,12,10]],"date-time":"2009-12-10T15:44:58Z","timestamp":1260459898000},"page":"635-642","source":"Crossref","is-referenced-by-count":1,"title":["An Efficient Low-Complexity Alternative to the ROB for Out-of-Order Retirement of Instructions"],"prefix":"10.1109","author":[{"given":"Salvador","family":"Petit","sequence":"first","affiliation":[]},{"given":"Rafael","family":"Ubal","sequence":"additional","affiliation":[]},{"given":"Julio","family":"Sahuquillo","sequence":"additional","affiliation":[]},{"given":"Pedro","family":"Lopez","sequence":"additional","affiliation":[]},{"given":"Jose","family":"Duato","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/40.491460"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003589"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/605397.605403"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1997.604689"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253245"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1993.282742"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2003.1183532"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2001.991122"},{"key":"2","doi-asserted-by":"crossref","DOI":"10.1109\/MICRO.2003.1253246","article-title":"Checkpoint Processing and Recovery: Towards Scalable Large Instruction Window Processors","author":"akkary","year":"2003","journal-title":"Proc 36th Int Symp Microarchitecture"},{"year":"0","key":"1"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2002.1176234"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2004.10008"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250697"},{"year":"0","key":"5"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2004.1291357"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.9"},{"key":"8","article-title":"The Microarchitecture of the Pentium 4 Processor","volume":"q1","author":"hinton","year":"2001","journal-title":"Intel Technology Journal"}],"event":{"name":"2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools (DSD)","start":{"date-parts":[[2009,8,27]]},"location":"Patras, Greece","end":{"date-parts":[[2009,8,29]]}},"container-title":["2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5349946\/5349947\/05350186.pdf?arnumber=5350186","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T02:40:33Z","timestamp":1497840033000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5350186\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,8]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/dsd.2009.237","relation":{},"subject":[],"published":{"date-parts":[[2009,8]]}}}