{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T12:28:29Z","timestamp":1725625709309},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2004]]},"DOI":"10.1109\/dsd.2004.1333313","type":"proceedings-article","created":{"date-parts":[[2004,11,8]],"date-time":"2004-11-08T16:27:50Z","timestamp":1099931270000},"page":"476-483","source":"Crossref","is-referenced-by-count":19,"title":["CASSE: a system-level modeling and design-space exploration tool for multiprocessor systems-on-chip"],"prefix":"10.1109","author":[{"given":"V.","family":"Reyes","sequence":"first","affiliation":[]},{"given":"T.","family":"Bautista","sequence":"additional","affiliation":[]},{"given":"G.","family":"Marrero","sequence":"additional","affiliation":[]},{"given":"P.P.","family":"Carballo","sequence":"additional","affiliation":[]},{"given":"W.","family":"Kruijtzer","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","article-title":"Architectural concept for IP re-use","author":"klapproth","year":"2002","journal-title":"VLSI ASP DAC"},{"journal-title":"AMBA AXI Protocol Specification","year":"2003","key":"17"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/IITC.2002.1014869"},{"journal-title":"Open Core Protocol Specification-v1 0","year":"1999","key":"15"},{"journal-title":"On-chip Bus DWG (OCB 2 2 0)","article-title":"Virtual component interface standard version 2","year":"2001","key":"16"},{"journal-title":"Functional Specification for SystemC 2 0 1","year":"2002","key":"13"},{"journal-title":"SystemC 2 0 1 Language Reference Manual","year":"0","key":"14"},{"key":"11","first-page":"39","article-title":"Eclipse: Heterogeneous multiprocessor architecture for flexible media processing","author":"rutten","year":"2002","journal-title":"Workshop on Parallel and Distributed Computing in Image Processing Video Processing and Multimedia (PDIVM'2002)"},{"key":"12","article-title":"Y-chart based system level performance analysis: An M-JPEG case study","author":"stefanov","year":"2000","journal-title":"Proc of the Progress Workshop"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.1997.606839"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/43.898830"},{"journal-title":"CAMELLIA Webpage","year":"0","key":"1"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1023\/A:1019782306621"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1269044"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2002.1047744"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/944645.944651"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1997.597140"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2001.968594"},{"key":"8","article-title":"Virtual architecture mapping: A systemC based methodology for architectural exploration of system-on-chip designs","author":"kogel","year":"2003","journal-title":"Int Workshop on Systems Architecture Modeling and Simulation"}],"event":{"name":"Euromicro Symposium on Digital System Design, 2004. DSD 2004.","start":{"date-parts":[[2004,9,3]]},"location":"Rennes, France","end":{"date-parts":[[2004,9,3]]}},"container-title":["Euromicro Symposium on Digital System Design, 2004. DSD 2004."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/9267\/29440\/01333313.pdf?arnumber=1333313","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,14]],"date-time":"2017-03-14T02:28:21Z","timestamp":1489458501000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1333313\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/dsd.2004.1333313","relation":{},"subject":[],"published":{"date-parts":[[2004]]}}}