{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T14:42:05Z","timestamp":1725806525639},"reference-count":31,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,11]]},"DOI":"10.1109\/dcis.2018.8681497","type":"proceedings-article","created":{"date-parts":[[2019,4,27]],"date-time":"2019-04-27T07:14:45Z","timestamp":1556349285000},"page":"1-6","source":"Crossref","is-referenced-by-count":3,"title":["Optimal Accelerated Test Regions for Time- Dependent Dielectric Breakdown Lifetime Parameters Estimation in FinFET Technology"],"prefix":"10.1109","author":[{"given":"Kexin","family":"Yang","sequence":"first","affiliation":[]},{"given":"Rui","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Taizhi","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Dae-Hyun","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Linda","family":"Milor","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.2307\/2276774"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/94.556564"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IIRW.2017.8361242"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2018.8368651"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DCIS.2017.8311631"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2017.06.038"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2017.06.040"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DCIS.2017.8311628"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/IMS3TW.2015.7177872"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.328"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2011.09.033"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2188400"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2062870"},{"year":"0","key":"ref28","article-title":"PrimeTime [Software]"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2014.6861125"},{"key":"ref3","first-page":"175","article-title":"A unified aging model of NBTI and HCI degradation towards lifetime reliability management for nanoscale MOSFET circuits","author":"wang","year":"2011","journal-title":"IEEE\/ACM Symp on Nanoscale Architectures"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IIRW.2017.8361243"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2011.2136316"},{"year":"0","key":"ref29"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"175","DOI":"10.1109\/NANOARCH.2011.5941501","article-title":"A unified aging model of NBTI and HCI degradation towards lifetime reliability management for nanoscale MOSFET circuits","author":"wang","year":"2011","journal-title":"IEEE\/ACM International Symposium on Nanoscale Architectures"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2016.2588724"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2008810"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2861769"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2015.09.017"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2008.915629"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2017.7936278"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/S0038-1101(02)00151-X"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2010.07.091"},{"key":"ref23","first-page":"168","article-title":"TDDB Kinetics and their Relationship with the E- and & E-models","author":"yiang","year":"2008","journal-title":"Int Interconnect Technology Conf"},{"journal-title":"Design Compiler [Software]","year":"0","key":"ref26"},{"year":"0","key":"ref25","article-title":"NanGate FreePDK15 Open Cell Library"}],"event":{"name":"2018 Conference on Design of Circuits and Integrated Systems (DCIS)","start":{"date-parts":[[2018,11,14]]},"location":"Lyon, France","end":{"date-parts":[[2018,11,16]]}},"container-title":["2018 Conference on Design of Circuits and Integrated Systems (DCIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8679952\/8681454\/08681497.pdf?arnumber=8681497","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,12,23]],"date-time":"2021-12-23T00:48:02Z","timestamp":1640220482000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8681497\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,11]]},"references-count":31,"URL":"https:\/\/doi.org\/10.1109\/dcis.2018.8681497","relation":{},"subject":[],"published":{"date-parts":[[2018,11]]}}}