{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:38:34Z","timestamp":1729661914409,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,7]]},"DOI":"10.1109\/chinagrid.2010.41","type":"proceedings-article","created":{"date-parts":[[2010,9,8]],"date-time":"2010-09-08T16:20:02Z","timestamp":1283962802000},"page":"197-202","source":"Crossref","is-referenced-by-count":0,"title":["A Multi-node MPI Implementation on the CellBE Processor"],"prefix":"10.1109","author":[{"given":"Chao","family":"Liu","sequence":"first","affiliation":[]},{"given":"Xingjun","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Jinghua","family":"Feng","sequence":"additional","affiliation":[]},{"given":"Xiaoshe","family":"Dong","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"year":"0","key":"ref4","article-title":"Accelerated Library Framework Programmer's Guide and API Reference"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1128022.1128027"},{"key":"ref10","first-page":"143","article-title":"A portable runtime interface for multi2level memory hierarchies","author":"houston","year":"2008","journal-title":"Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2008)"},{"key":"ref6","article-title":"A Buffered Mode MPI Implementation for the Cell BE™ Processor","author":"krishna","year":"2007","journal-title":"Proceedings of the International Conference on Computational Science (ICCS)"},{"year":"0","key":"ref11","article-title":"Network-based computing laboratory of the Ohio state university[EB\/OL]"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2006.17"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1147\/sj.451.0085"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-74742-0_86"},{"key":"ref2","article-title":"The Cell processor architecture","volume":"3","year":"2005","journal-title":"Proceedings of the 38th Annual IEEE\/ACM International Symposium on Micro-Architecture (MICR0238)"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"226","DOI":"10.1145\/1229428.1229477","article-title":"Compilation for explicitly managed memory hierarchies","author":"knight","year":"2007","journal-title":"Proceedings of the 12th ACM SIGPLAN Symposium on Principles and Practice of Parallel rogramming (PPoPP 2007)"},{"key":"ref1","first-page":"1","article-title":"Chip multiprocessing and the Cell Broadband Engine","author":"gschwind","year":"2006","journal-title":"Proceedings of the 3rd Conference on Computing Frontiers"}],"event":{"name":"2010 Fifth Chinagrid Annual Conference (ChinaGrid)","start":{"date-parts":[[2010,7,16]]},"location":"Guangzhou, TBD, China","end":{"date-parts":[[2010,7,18]]}},"container-title":["2010 Fifth Annual ChinaGrid Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5562735\/5562862\/05562881.pdf?arnumber=5562881","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T09:49:18Z","timestamp":1497865758000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5562881\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,7]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/chinagrid.2010.41","relation":{},"subject":[],"published":{"date-parts":[[2010,7]]}}}