{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,3,1]],"date-time":"2024-03-01T06:01:48Z","timestamp":1709272908376},"reference-count":10,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2001,1,1]],"date-time":"2001-01-01T00:00:00Z","timestamp":978307200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Des. Test. Comput."],"published-print":{"date-parts":[[2001]]},"DOI":"10.1109\/54.914613","type":"journal-article","created":{"date-parts":[[2002,8,24]],"date-time":"2002-08-24T18:17:23Z","timestamp":1030213043000},"page":"31-41","source":"Crossref","is-referenced-by-count":25,"title":["Software energy reduction techniques for variable-voltage processors"],"prefix":"10.1109","volume":"18","author":[{"given":"T.","family":"Okuma","sequence":"first","affiliation":[]},{"given":"H.","family":"Yasuura","sequence":"additional","affiliation":[]},{"given":"T.","family":"Ishihara","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"bibd20314","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337785"},{"key":"bibd20313","doi-asserted-by":"publisher","DOI":"10.1145\/368434.368693"},{"key":"bibd20312","doi-asserted-by":"publisher","DOI":"10.1109\/ISSS.1999.814256"},{"key":"bibd20311","doi-asserted-by":"crossref","first-page":"197","DOI":"10.1145\/280756.280894","article-title":"Voltage scheduling problem for dynamically variable voltage processors","author":"ishihara","year":"1998","journal-title":"Proceedings 1998 International Symposium on Low Power Electronics and Design (IEEE Cat No 98TH8379) LPE"},{"key":"bibd20317","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1998.144338"},{"key":"bibd20318","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1999.781298"},{"key":"bibd20315","article-title":"crusoe processor","year":"0"},{"key":"bibd20316","doi-asserted-by":"crossref","first-page":"176","DOI":"10.1109\/DAC.1998.724462","article-title":"Power optimization of variable voltage core-based systems","author":"inki hong","year":"1998","journal-title":"Proceedings 1998 Design and Automation Conference 35th DAC (Cat No 98CH36175) DAC"},{"key":"bibd203110","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2000.839787"},{"key":"bibd20319","doi-asserted-by":"crossref","first-page":"96","DOI":"10.1109\/LPE.2000.155260","article-title":"voltage scheduling in the iparm microprocessor system","author":"pering","year":"2000","journal-title":"ISLPED 00 the 2000 International Symposium on Low Power Electronics and Design (Cat No 00TH8514) LPE-00"}],"container-title":["IEEE Design & Test of Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/54\/19753\/00914613.pdf?arnumber=914613","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:09:18Z","timestamp":1638216558000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/914613\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2001]]},"references-count":10,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/54.914613","relation":{},"ISSN":["0740-7475"],"issn-type":[{"value":"0740-7475","type":"print"}],"subject":[],"published":{"date-parts":[[2001]]}}}