乐胖代购免代理版

{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,3,13]],"date-time":"2024-03-13T13:13:57Z","timestamp":1710335637462},"reference-count":29,"publisher":"Institution of Engineering and Technology (IET)","issue":"2","license":[{"start":{"date-parts":[[2014,3,1]],"date-time":"2014-03-01T00:00:00Z","timestamp":1393632000000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"},{"start":{"date-parts":[[2014,3,1]],"date-time":"2014-03-01T00:00:00Z","timestamp":1393632000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/doi.wiley.com\/10.1002\/tdm_license_1.1"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IET Computers & Digital Techniques"],"published-print":{"date-parts":[[2014,3]]},"DOI":"10.1049\/iet-cdt.2013.0010","type":"journal-article","created":{"date-parts":[[2013,9,4]],"date-time":"2013-09-04T22:17:21Z","timestamp":1378333041000},"page":"70-82","source":"Crossref","is-referenced-by-count":13,"title":["Optimising the SHA\u2010512 cryptographic hash function on FPGAs"],"prefix":"10.1049","volume":"8","author":[{"given":"George S.","family":"Athanasiou","sequence":"first","affiliation":[{"name":"Electrical and Computer Engineering DepartmentUniversity of PatrasGreece"}]},{"given":"Harris E.","family":"Michail","sequence":"additional","affiliation":[{"name":"Electrical Engineering, Computer Engineering and Informatics DepartmentCyprus University of TechnologyCyprus"}]},{"given":"George","family":"Theodoridis","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering DepartmentUniversity of PatrasGreece"}]},{"given":"Costas E.","family":"Goutis","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering DepartmentUniversity of PatrasGreece"}]}],"member":"265","published-online":{"date-parts":[[2014,3]]},"reference":[{"key":"e_1_2_6_2_2","volume-title":"The keyed\u2010hash message authentication code (HMAC)","author":"NIST\u2010FIPS 198","year":"2006"},{"key":"e_1_2_6_3_2","volume-title":"Guide to IPSec VPN's","author":"NIST\u2010SP800\u201077","year":"2005"},{"key":"e_1_2_6_4_2","volume-title":"Introduction to public key technology and the federal PKI infrastructure","author":"NIST\u2010 SP 800\u201032","year":"2001"},{"key":"e_1_2_6_5_2","volume-title":"Secure electronic transactions: introduction and technical reference","author":"Loeb L.","year":"1998"},{"key":"e_1_2_6_6_2","volume-title":"SSL & TLS essentials: securing the web","author":"Thomas S.","year":"2000"},{"key":"e_1_2_6_7_2","volume-title":"Secure hash standard (SHS)","author":"NIST\u2010FIPS 180\u20103","year":"2008"},{"key":"e_1_2_6_8_2","doi-asserted-by":"crossref","unstructured":"Wang X. Yin Y.L. Yu H.: \u2018Finding collisions in the full SHA1\u2019.Proc. Int. Conf. Crypto Berlin\/Heidelberg 2005(LNCS3621) pp.17\u201336","DOI":"10.1007\/11535218_2"},{"key":"e_1_2_6_9_2","unstructured":"http:\/\/www.csrc.nist.gov\/groups\/ST\/hash\/sha\u20103\/winner_sha\u20103.html accessed January 2013"},{"key":"e_1_2_6_10_2","doi-asserted-by":"crossref","unstructured":"Preneel B.: \u2018Cryptographic hash functions and the SHA\u20103 competition\u2019 talk inAsiacrypt 2010 available athttps:\/\/www.cosic.esat.kuleuven.be\/publications\/talk\u2010198.pdf accessed January 2013","DOI":"10.1007\/978-3-642-11925-5_1"},{"key":"e_1_2_6_11_2","unstructured":"Ermert M.: \u2018Doubts over necessity of SHA\u20103 cryptography standard\u2019 available athttp:\/\/www.h\u2010online.com\/security\/news\/item\/Doubts\u2010over\u2010necessity\u2010of\u2010SHA\u20103\u2010cryptography\u2010standard\u20101498071.html accessed January 2013"},{"key":"e_1_2_6_12_2","volume-title":"Recommendation for applications using approved hash algorithms","author":"NIST\u2010SP800\u2010107","year":"2011"},{"issue":"8","key":"e_1_2_6_13_2","doi-asserted-by":"crossref","first-page":"999","DOI":"10.1109\/TVLSI.2008.2000450","article-title":"Cost\u2010efficient SHA hardware accelerators","volume":"16","author":"Chaves R.","year":"2008","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"e_1_2_6_14_2","doi-asserted-by":"crossref","unstructured":"Chaves R. Kuzmanov G. Sousa L. Vassiliadis S.: \u2018Improving SHA\u20102 hardware implementations\u2019.Proc. Cryptographic Hardware and Embedded Systems (CHES) 2006 pp.298\u2013310.","DOI":"10.1007\/11894063_24"},{"key":"e_1_2_6_15_2","doi-asserted-by":"crossref","unstructured":"Zeghid M. Bouallegue B. Baganne A. Machhout M. Tourki R.: \u2018A reconfigurable implementation of the new secure hash algorithm\u2019.Proc. Second Int. Conf. Availability Reliability and Security 2007 (ARES 2007) 10\u201313 April2007 pp.281\u2013285","DOI":"10.1109\/ARES.2007.17"},{"key":"e_1_2_6_16_2","doi-asserted-by":"crossref","first-page":"324","DOI":"10.1007\/978-3-540-24660-2_25","volume-title":"Topics in Cryptology \u2013 CT\u2010RSA 2004","author":"Lien R.","year":"2004"},{"key":"e_1_2_6_17_2","unstructured":"Aisopos F. Aisopos K. Schinianakis D. Michail H. Kakarountas A.P.: \u2018A novel high\u2010throughput implementation of a partially unrolled SHA\u2010512\u2019.IEEE Mediterranean Electrotechnical Conf. 2006 (MELECON 2006) 16\u201319 May2006 pp.61\u201365"},{"key":"e_1_2_6_18_2","unstructured":"McLoone M. McCanny J.V.: \u2018Efficient single\u2010chip implementation of SHA\u2010384 and SHA\u2010512\u2019.Proc. 2002 IEEE Int. Conf. Field\u2010Programmable Technology 2002 (FPT) 16\u201318 December2002 pp.311\u2013314"},{"key":"e_1_2_6_19_2","first-page":"147","article-title":"Architectural design features of a programmable hgh throughput reconfigurable SHA\u2010256 processor","author":"Zeghid M.","year":"2008","journal-title":"J. Inf. Assurance Sec."},{"key":"e_1_2_6_20_2","doi-asserted-by":"crossref","unstructured":"Grembowski T. Lien R. Gaj K. et al.: \u2018Comparative analysis of the hardware implementations of Hash functions SHA\u20101 and SHA\u2010512\u2019.Proc. Fifth Int. Conf. (ISC 2002) Sao Paulo Brazil September\/October2002(LNCS 2433) pp.75\u201389","DOI":"10.1007\/3-540-45811-5_6"},{"key":"e_1_2_6_21_2","unstructured":"McLoone M. McCanny J.V.: \u2018Efficient single\u2010chip implementation of SHA\u2010384 and SHA\u2010512\u2019.Proc. 2002 IEEE Int. Conf. Field\u2010Programmable Technology 2002 (FPT) 16\u201318 December2002 pp.311\u2013314"},{"issue":"6","key":"e_1_2_6_22_2","doi-asserted-by":"crossref","first-page":"345","DOI":"10.1016\/j.compeleceng.2005.07.001","article-title":"Hardware implementation analysis of SHA\u2010256 and SHA\u2010512 algorithms on FPGAs","volume":"31","author":"Ahmad I.","year":"2005","journal-title":"Comput. Electr. Eng."},{"key":"e_1_2_6_23_2","doi-asserted-by":"crossref","first-page":"227","DOI":"10.1007\/s11227-005-0086-5","article-title":"Implementation of the SHA\u20102 hash family standard using FPGAs","volume":"31","author":"Sklavos N.","year":"2005","journal-title":"J. Supercomput."},{"issue":"2","key":"e_1_2_6_24_2","doi-asserted-by":"crossref","first-page":"127","DOI":"10.1016\/j.sysarc.2006.09.006","article-title":"Multi\u2010mode operator for SHA\u20102 hash functions","volume":"53","author":"Glabb R.","year":"2007","journal-title":"J. Syst. Archit."},{"key":"e_1_2_6_25_2","unstructured":"McEvoy R.P. Crowe F.M. Murphy C.C. Marnane W.P.: \u2018Optimisation of the SHA\u20102 family of hash functions on FPGAs\u2019.IEEE Computer Society Annual Symp. on Emerging VLSI Technologies and Architectures 2006 2\u20133 March2006 pp.6"},{"issue":"1","key":"e_1_2_6_26_2","doi-asserted-by":"crossref","first-page":"3","DOI":"10.1016\/j.vlsi.2005.12.006","article-title":"ASIC\u2010hardware\u2010focused comparison for Hash functions MD5, RIPEMD\u2010160, and SHS","volume":"40","author":"Satoh A.","year":"2007","journal-title":"VLSI J. Integr."},{"key":"e_1_2_6_27_2","doi-asserted-by":"crossref","unstructured":"Dadda L. Macchetti M. Owen J.: \u2018An ASIC design for a high speed implementation of the hash function SHA\u2010256 (384 512)\u2019.Proc. 14th ACM Great Lakes Symp. VLSI (GLSVLSI \u201804) New York NY USA 2004 pp.421\u2013425","DOI":"10.1145\/988952.989053"},{"key":"e_1_2_6_28_2","doi-asserted-by":"crossref","unstructured":"Kim T. Jao W. Tjiang S.: \u2018Arithmetic optimization using carry\u2010save\u2010adders\u2019.Proc. 35th Design Automation Conf. (DAC \u201898) New York NY USA 1998 pp.433\u2013438","DOI":"10.1145\/277044.277166"},{"key":"e_1_2_6_29_2","unstructured":"Ortiz M. Quiles F. Hormigo J. Jaime F.J. Villalba J. Zapata E.: \u2018Efficient implementation of carry\u2010save adders in FPGAs\u2019.Proc. 20th IEEE Int. Conf. Application\u2010Specific Systems Architectures and Processors (ASAP 2009) 2009 pp.207\u2013210"},{"key":"e_1_2_6_30_2","article-title":"Multi\u2010operand redundant adders on FPGAs","volume":"99","author":"Hormigo J.","year":"2012","journal-title":"IEEE Trans. Comput."}],"container-title":["IET Computers & Digital Techniques"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1049\/iet-cdt.2013.0010","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/full-xml\/10.1049\/iet-cdt.2013.0010","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1049\/iet-cdt.2013.0010","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,3,5]],"date-time":"2022-03-05T15:12:17Z","timestamp":1646493137000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1049\/iet-cdt.2013.0010"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,3]]},"references-count":29,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2014,3]]}},"alternative-id":["10.1049\/iet-cdt.2013.0010"],"URL":"https:\/\/doi.org\/10.1049\/iet-cdt.2013.0010","archive":["Portico"],"relation":{},"ISSN":["1751-8601","1751-861X"],"issn-type":[{"value":"1751-8601","type":"print"},{"value":"1751-861X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,3]]}}}