乐胖代购免代理版

{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,1,20]],"date-time":"2023-01-20T22:14:23Z","timestamp":1674252863963},"reference-count":58,"publisher":"Elsevier BV","issue":"2","license":[{"start":{"date-parts":[[2014,3,1]],"date-time":"2014-03-01T00:00:00Z","timestamp":1393632000000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"funder":[{"name":"National Science Foundation","award":["0856038"]}],"content-domain":{"domain":["elsevier.com","sciencedirect.com"],"crossmark-restriction":true},"short-container-title":["Integration"],"published-print":{"date-parts":[[2014,3]]},"DOI":"10.1016\/j.vlsi.2013.08.004","type":"journal-article","created":{"date-parts":[[2013,9,15]],"date-time":"2013-09-15T02:17:31Z","timestamp":1379211451000},"page":"213-231","update-policy":"http:\/\/dx.doi.org\/10.1016\/elsevier_cm_policy","source":"Crossref","is-referenced-by-count":10,"title":["Analog circuit design space description based on ordered clustering of feature uniqueness and similarity"],"prefix":"10.1016","volume":"47","author":[{"given":"Cristian","family":"Ferent","sequence":"first","affiliation":[]},{"given":"Alex","family":"Doboli","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"issue":"April","key":"10.1016\/j.vlsi.2013.08.004_bib1","first-page":"712","article-title":"Structural macromodeling of analog circuits through model decoupling and transformation","volume":"27","author":"Wei","year":"2008","journal-title":"IEEE Transaction on CADICS"},{"issue":"July","key":"10.1016\/j.vlsi.2013.08.004_bib2","article-title":"Modeling nonlinear dynamics in analog circuits via root localization","volume":"22","author":"Huang","year":"2003","journal-title":"IEEE Transaction on CADICS"},{"issue":"July (7)","key":"10.1016\/j.vlsi.2013.08.004_bib3","article-title":"Analog small-signal modeling","volume":"48","author":"Leyn","year":"2001","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"4","key":"10.1016\/j.vlsi.2013.08.004_bib4","doi-asserted-by":"crossref","DOI":"10.1109\/TCSI.2004.823664","article-title":"Piecewise-linear approximation of nonlinear dynamical systems","volume":"51","author":"Storace","year":"2004","journal-title":"IEEE Transactions on Circuits & Systems I"},{"issue":"3","key":"10.1016\/j.vlsi.2013.08.004_bib5","doi-asserted-by":"crossref","DOI":"10.1109\/82.754866","article-title":"High-frequency distortion analysis of analog integrated circuits","volume":"46","author":"Wambacq","year":"1999","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"9","key":"10.1016\/j.vlsi.2013.08.004_bib6","first-page":"1215","article-title":"Analysis and compact behavioral modeling of nonlinear distortion in analog communication circuits","volume":"22","author":"Dobrovolny","year":"2003","journal-title":"IEEE Transaction on CADICS"},{"key":"10.1016\/j.vlsi.2013.08.004_bib7","unstructured":"M. Rewienski, A Trajectory Piecewise-Linear Approach to Model Order Reduction of Nonlinear Dynamical Systems. Ph.D. Thesis, MIT, 2003."},{"issue":"2","key":"10.1016\/j.vlsi.2013.08.004_bib8","article-title":"Compact reduced-order modeling of weakly nonlinear analog and rf circuits","volume":"24","author":"Li","year":"2005","journal-title":"IEEE Transaction on CADICS"},{"issue":"February (2)","key":"10.1016\/j.vlsi.2013.08.004_bib9","first-page":"171","article-title":"Projection-based approaches for model reduction of weakly nonlinear, time-varying systems","volume":"22","author":"Phillips","year":"2003","journal-title":"IEEE Transaction on CADICS"},{"key":"10.1016\/j.vlsi.2013.08.004_bib10","doi-asserted-by":"crossref","unstructured":"C. Ferent, A. Doboli, A symbolic technique for automated characterization of the uniqueness and similarity of analog circuit design features, in: Design, Automation Test in Europe Conference Exhibition (DATE 2011), March 2011.","DOI":"10.1109\/DATE.2011.5763316"},{"issue":"January","key":"10.1016\/j.vlsi.2013.08.004_bib11","doi-asserted-by":"crossref","first-page":"39","DOI":"10.1016\/j.vlsi.2010.06.003","article-title":"Measuring the uniqueness and variety of analog circuit design features","volume":"44","author":"Ferent","year":"2011","journal-title":"Integration \u2013 The VLSI Journal"},{"key":"10.1016\/j.vlsi.2013.08.004_bib12","series-title":"Data Mining","author":"Han","year":"2006"},{"key":"10.1016\/j.vlsi.2013.08.004_bib13","series-title":"Pattern Recognition and Machine Learning","author":"Bishop","year":"2006"},{"key":"10.1016\/j.vlsi.2013.08.004_bib14","series-title":"Design of Analog CMOS Integrated Circuits","author":"Razavi","year":"2002"},{"issue":"October","key":"10.1016\/j.vlsi.2013.08.004_bib15","doi-asserted-by":"crossref","first-page":"1118","DOI":"10.1109\/TCSII.2006.882123","article-title":"High-CMRR current amplifier architecture and its CMOS implementation","volume":"53","author":"Pennisi","year":"2006","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"February","key":"10.1016\/j.vlsi.2013.08.004_bib16","doi-asserted-by":"crossref","first-page":"266","DOI":"10.1109\/TCSI.2007.913689","article-title":"A modified CFOA and its applications to simulated inductors, capacitance multipliers, and analog filters","volume":"55","author":"Yuce","year":"2008","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"May","key":"10.1016\/j.vlsi.2013.08.004_bib17","doi-asserted-by":"crossref","first-page":"617","DOI":"10.1109\/81.922465","article-title":"Current-feedback amplifiers versus voltage operational amplifiers","volume":"48","author":"Palumbo","year":"2001","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"October","key":"10.1016\/j.vlsi.2013.08.004_bib18","doi-asserted-by":"crossref","first-page":"1967","DOI":"10.1109\/TCSI.2004.835662","article-title":"Positive feedback frequency compensation for low-voltage low-power three-stage amplifier","volume":"51","author":"Ramos","year":"2004","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"January","key":"10.1016\/j.vlsi.2013.08.004_bib19","doi-asserted-by":"crossref","first-page":"34","DOI":"10.1109\/TCSII.2005.855731","article-title":"A new design topology for low-voltage CMOS current feedback amplifiers","volume":"53","author":"Maundy","year":"2006","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"May","key":"10.1016\/j.vlsi.2013.08.004_bib20","first-page":"894","article-title":"A 1.2-V 12-b 120-MS\/s SHA-free dual-channel nyquist ADC based on midcode calibration","volume":"56","author":"Choi","year":"2009","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"January","key":"10.1016\/j.vlsi.2013.08.004_bib21","doi-asserted-by":"crossref","first-page":"103","DOI":"10.1109\/TCSI.2008.2010592","article-title":"A CMOS VGA with DC offset cancellation for direct-conversion receivers","volume":"56","author":"Zheng","year":"2009","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"October","key":"10.1016\/j.vlsi.2013.08.004_bib22","doi-asserted-by":"crossref","first-page":"304","DOI":"10.1109\/TBCAS.2009.2022504","article-title":"Sensitivity-enhanced CMOS phase luminometry system using xerogel-based sensors","volume":"3","author":"Yao","year":"2009","journal-title":"IEEE Transactions on Biomedical Circuits and Systems"},{"issue":"July","key":"10.1016\/j.vlsi.2013.08.004_bib23","doi-asserted-by":"crossref","first-page":"568","DOI":"10.1109\/TCSII.2006.875320","article-title":"A free but efficient low-voltage class-AB two-stage operational amplifier","volume":"53","author":"Ram\u00edrez-Angulo","year":"2006","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"9","key":"10.1016\/j.vlsi.2013.08.004_bib24","doi-asserted-by":"crossref","first-page":"1041","DOI":"10.1109\/81.948432","article-title":"Analysis of multistage amplifier-frequency compensation","volume":"48","author":"Leung","year":"2001","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"3","key":"10.1016\/j.vlsi.2013.08.004_bib25","doi-asserted-by":"crossref","first-page":"169","DOI":"10.1109\/TCSII.2005.858493","article-title":"A new modeling and optimization of gain-boosted cascode amplifier for high-speed and low-voltage applications","volume":"53","author":"Ahmadi","year":"2006","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"6","key":"10.1016\/j.vlsi.2013.08.004_bib26","doi-asserted-by":"crossref","first-page":"918","DOI":"10.1109\/81.852946","article-title":"Novel cmos current feedback op-amp realization suitable for high frequency applications","volume":"47","author":"Ismail","year":"2000","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"1","key":"10.1016\/j.vlsi.2013.08.004_bib27","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1109\/TCSII.2007.906086","article-title":"Design procedure for settling time minimization in three-stage nested-miller amplifiers","volume":"55","author":"Pugliese","year":"2008","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"May","key":"10.1016\/j.vlsi.2013.08.004_bib28","doi-asserted-by":"crossref","first-page":"384","DOI":"10.1109\/TCSII.2009.2019169","article-title":"Modified model for settling behavior of operational amplifiers in nanoscale CMOS","volume":"56","author":"Rezaee-Dehsorkh","year":"2009","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"September","key":"10.1016\/j.vlsi.2013.08.004_bib29","doi-asserted-by":"crossref","first-page":"1921","DOI":"10.1109\/TCSI.2008.2011581","article-title":"A high-gain acquisition system with very large input range","volume":"56","author":"Rieger","year":"2009","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"August","key":"10.1016\/j.vlsi.2013.08.004_bib30","doi-asserted-by":"crossref","first-page":"728","DOI":"10.1109\/TCSII.2008.922457","article-title":"Class-D audio amplifier using 1-bit fourth-order delta-sigma modulation","volume":"55","author":"Kang","year":"2008","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"April","key":"10.1016\/j.vlsi.2013.08.004_bib31","doi-asserted-by":"crossref","first-page":"691","DOI":"10.1109\/TCSI.2004.826208","article-title":"Micro-power low-offset instrumentation amplifier IC design for biomedical system applications","volume":"51","author":"Yen","year":"2004","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"November","key":"10.1016\/j.vlsi.2013.08.004_bib32","doi-asserted-by":"crossref","first-page":"1175","DOI":"10.1109\/TCSII.2006.882364","article-title":"Quasi rail-to-rail very low-voltage OPAMP with a single pMOS input differential pair","volume":"53","author":"Baez-Villegas","year":"2006","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"October","key":"10.1016\/j.vlsi.2013.08.004_bib33","first-page":"758","article-title":"Single-capacitor active-feedback compensation for small-capacitive-load three-stage amplifiers","volume":"56","author":"Guo","year":"2009","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"August","key":"10.1016\/j.vlsi.2013.08.004_bib34","doi-asserted-by":"crossref","first-page":"1648","DOI":"10.1109\/TCSI.2006.879058","article-title":"A 95-dB linear low-power variable gain amplifier","volume":"53","author":"Duong","year":"2006","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"9","key":"10.1016\/j.vlsi.2013.08.004_bib35","doi-asserted-by":"crossref","first-page":"2535","DOI":"10.1109\/JSSC.2009.2024819","article-title":"The recycling folded cascode","author":"Assaad","year":"2009","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"7","key":"10.1016\/j.vlsi.2013.08.004_bib36","doi-asserted-by":"crossref","first-page":"1459","DOI":"10.1109\/TCSI.2007.900170","article-title":"Advances in reversed nested miller compensation","volume":"54","author":"Grasso","year":"2007","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"3","key":"10.1016\/j.vlsi.2013.08.004_bib37","doi-asserted-by":"crossref","first-page":"584","DOI":"10.1109\/JSSC.2005.843602","article-title":"Single miller capacitor frequency compensation technique for low-power multistage amplifiers","volume":"40","author":"Fan","year":"2005","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"2","key":"10.1016\/j.vlsi.2013.08.004_bib38","doi-asserted-by":"crossref","first-page":"454","DOI":"10.1109\/JSSC.2011.2170770","article-title":"88-dB PSRR PWM class-d amplifier for direct battery hookup","volume":"47","author":"Choi","year":"2012","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"11","key":"10.1016\/j.vlsi.2013.08.004_bib39","doi-asserted-by":"crossref","first-page":"3373","DOI":"10.1109\/TCSI.2008.2001800","article-title":"Feedforward-regulated cascode OTA for gigahertz applications","volume":"55","author":"Zheng","year":"2008","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"1","key":"10.1016\/j.vlsi.2013.08.004_bib40","doi-asserted-by":"crossref","first-page":"93","DOI":"10.1109\/TCSI.2011.2161393","article-title":"Distortion modeling of feedback two-stage amplifier compensated with miller capacitor and nulling resistor","volume":"59","author":"Miao","year":"2012","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"3","key":"10.1016\/j.vlsi.2013.08.004_bib41","doi-asserted-by":"crossref","first-page":"499","DOI":"10.1109\/TCSI.2005.859575","article-title":"Frequency-dependent harmonic-distortion analysis of a linearized cross-coupled CMOS OTA and its application to OTA-C filters","volume":"53","author":"Chen","year":"2006","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"6","key":"10.1016\/j.vlsi.2013.08.004_bib42","doi-asserted-by":"crossref","first-page":"1665","DOI":"10.1109\/19.982965","article-title":"An optimization approach to designing OTAs for low-voltage sigma-delta modulators","volume":"50","author":"Lampinen","year":"2001","journal-title":"IEEE Transactions on Instrumentation and Measurement"},{"issue":"11","key":"10.1016\/j.vlsi.2013.08.004_bib43","doi-asserted-by":"crossref","first-page":"766","DOI":"10.1109\/TCSII.2005.852530","article-title":"Design procedure for two-stage CMOS operational amplifiers employing current buffer","volume":"52","author":"Mahattanakul","year":"2005","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"6","key":"10.1016\/j.vlsi.2013.08.004_bib44","doi-asserted-by":"crossref","first-page":"770","DOI":"10.1109\/JSSC.2002.1004582","article-title":"Transconductance amplifier structures with very small transconductances","volume":"37","author":"Veeravalli","year":"2002","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"3","key":"10.1016\/j.vlsi.2013.08.004_bib45","doi-asserted-by":"crossref","first-page":"511","DOI":"10.1109\/JSSC.2002.808326","article-title":"Active-feedback frequency-compensation technique for low-power multistage amplifiers","volume":"38","author":"Lee","year":"2003","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"6","key":"10.1016\/j.vlsi.2013.08.004_bib46","doi-asserted-by":"crossref","first-page":"958","DOI":"10.1109\/JSSC.2003.811979","article-title":"A low-power low-noise CMOS amplifier for neural recording applications","volume":"38","author":"Harrison","year":"2003","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"2","key":"10.1016\/j.vlsi.2013.08.004_bib47","doi-asserted-by":"crossref","first-page":"275","DOI":"10.1109\/TCSI.2003.820254","article-title":"Miller compensation using current buffers in fully differential CMOS two-stage operational amplifiers","volume":"51","author":"Hurst","year":"2004","journal-title":"IEEE Transactions on Circuits and Systems I"},{"issue":"5","key":"10.1016\/j.vlsi.2013.08.004_bib48","doi-asserted-by":"crossref","first-page":"1068","DOI":"10.1109\/JSSC.2005.845977","article-title":"Low-voltage super class AB CMOS OTA cells with very high slew rate and power efficiency","volume":"40","author":"Lopez-Martin","year":"2005","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"7","key":"10.1016\/j.vlsi.2013.08.004_bib49","doi-asserted-by":"crossref","first-page":"1514","DOI":"10.1109\/JSSC.2005.847216","article-title":"Transconductance with capacitances feedback compensation for multistage amplifiers","volume":"40","author":"Peng","year":"2005","journal-title":"IEEE Journal of Solid-State Circuits"},{"issue":"5","key":"10.1016\/j.vlsi.2013.08.004_bib50","doi-asserted-by":"crossref","first-page":"394","DOI":"10.1109\/TCSII.2007.914407","article-title":"Current-mode high-accuracy high-precision CMOS amplifiers","volume":"55","author":"Falconi","year":"2008","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"11","key":"10.1016\/j.vlsi.2013.08.004_bib51","doi-asserted-by":"crossref","first-page":"1099","DOI":"10.1109\/TCSII.2008.2003362","article-title":"Comparison of the frequency compensation techniques for CMOS two-stage miller OTAS","volume":"55","author":"Grasso","year":"2008","journal-title":"IEEE Transactions on Circuits and Systems II"},{"issue":"4","key":"10.1016\/j.vlsi.2013.08.004_bib52","doi-asserted-by":"crossref","first-page":"344","DOI":"10.1109\/TBCAS.2011.2177089","article-title":"Design of ultra-low power biopotential amplifiers for biosignal acquisition applications","volume":"6","author":"Zhang","year":"2012","journal-title":"IEEE Transactions on Biomedical Circuits and Systems"},{"issue":"7","key":"10.1016\/j.vlsi.2013.08.004_bib53","doi-asserted-by":"crossref","first-page":"1534","DOI":"10.1109\/JSSC.2011.2143610","article-title":"A 1.8\u03bcW 60nV\/\u221a Hz capacitively-coupled chopper instrumentation amplifier in 65nm cmos for wireless sensor nodes","volume":"46","author":"Fan","year":"2011","journal-title":"IEEE Journal of Solid State Circuits"},{"issue":"4","key":"10.1016\/j.vlsi.2013.08.004_bib54","first-page":"616","article-title":"Symbolic matching and constraint generation for systematic comparison of analog circuits, Computer-Aided Design of Integrated Circuits and Systems","volume":"32","author":"Ferent","year":"2013","journal-title":"IEEE Transactions on"},{"key":"10.1016\/j.vlsi.2013.08.004_bib55","doi-asserted-by":"crossref","unstructured":"C. Ferent, S. Montano, A. Doboli, A prototype framework for conceptual design of novel analog circuits, in: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, 2012.","DOI":"10.1109\/SMACD.2012.6339405"},{"key":"10.1016\/j.vlsi.2013.08.004_bib56","doi-asserted-by":"crossref","unstructured":"J.R. Koza, F.H. Bennett, III, D. Andre, M.A. Keane, Automated WYWIWYG design of both the topology and component values of analog electrical circuits using genetic programming, in: Proceedings of First Annual Conference on Genetic Programming, July 1996, pp. 28\u201331.","DOI":"10.1007\/978-94-009-0279-4_9"},{"issue":"November","key":"10.1016\/j.vlsi.2013.08.004_bib57","doi-asserted-by":"crossref","first-page":"1237","DOI":"10.1109\/TCAD.2002.804109","article-title":"The invention of CMOS amplifiers using genetic programming and current-flow analysis","volume":"21","author":"Sripramong","year":"2002","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"issue":"March","key":"10.1016\/j.vlsi.2013.08.004_bib58","doi-asserted-by":"crossref","first-page":"480","DOI":"10.1109\/TCAD.2006.885734","article-title":"Systematic methodology for designing reconfigurable delta sigma modulator topologies for multimode communication systems","volume":"26","author":"Wei","year":"2007","journal-title":"IEEE Transactions on CADICS"}],"container-title":["Integration"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S016792601300045X?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S016792601300045X?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2020,5,8]],"date-time":"2020-05-08T21:29:36Z","timestamp":1588973376000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S016792601300045X"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,3]]},"references-count":58,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2014,3]]}},"alternative-id":["S016792601300045X"],"URL":"https:\/\/doi.org\/10.1016\/j.vlsi.2013.08.004","relation":{},"ISSN":["0167-9260"],"issn-type":[{"value":"0167-9260","type":"print"}],"subject":[],"published":{"date-parts":[[2014,3]]},"assertion":[{"value":"Elsevier","name":"publisher","label":"This article is maintained by"},{"value":"Analog circuit design space description based on ordered clustering of feature uniqueness and similarity","name":"articletitle","label":"Article Title"},{"value":"Integration","name":"journaltitle","label":"Journal Title"},{"value":"https:\/\/doi.org\/10.1016\/j.vlsi.2013.08.004","name":"articlelink","label":"CrossRef DOI link to publisher maintained version"},{"value":"article","name":"content_type","label":"Content Type"},{"value":"Copyright \u00a9 2013 Elsevier B.V. All rights reserved.","name":"copyright","label":"Copyright"}]}}