{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,30]],"date-time":"2022-03-30T16:46:43Z","timestamp":1648658803760},"reference-count":41,"publisher":"Elsevier BV","issue":"1","license":[{"start":{"date-parts":[[2015,1,1]],"date-time":"2015-01-01T00:00:00Z","timestamp":1420070400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.elsevier.com\/tdm\/userlicense\/1.0\/"}],"content-domain":{"domain":["elsevier.com","sciencedirect.com"],"crossmark-restriction":true},"short-container-title":["Journal of Systems Architecture"],"published-print":{"date-parts":[[2015,1]]},"DOI":"10.1016\/j.sysarc.2014.10.003","type":"journal-article","created":{"date-parts":[[2014,10,31]],"date-time":"2014-10-31T20:19:23Z","timestamp":1414786763000},"page":"28-39","update-policy":"http:\/\/dx.doi.org\/10.1016\/elsevier_cm_policy","source":"Crossref","is-referenced-by-count":1,"title":["Using Chaos Theory based workload analysis to perform Dynamic Frequency Scaling on MPSoCs"],"prefix":"10.1016","volume":"61","author":[{"given":"Nikolaos","family":"Zompakis","sequence":"first","affiliation":[]},{"given":"Alexandros","family":"Bartzas","sequence":"additional","affiliation":[]},{"given":"Dimitrios","family":"Soudris","sequence":"additional","affiliation":[]}],"member":"78","reference":[{"key":"10.1016\/j.sysarc.2014.10.003_b0005","unstructured":"E. Le Sueur, G. Heiser, Dynamic voltage and frequency scaling: the laws of diminishing returns, in: Proceedings of the 2010 international conference on Power aware computing and systems, HotPower\u201910, USENIX Association, Berkeley, CA, USA, 2010, pp. 1\u20138. URL: ."},{"key":"10.1016\/j.sysarc.2014.10.003_b0010","doi-asserted-by":"crossref","unstructured":"J. Postel, Rfc 793: transmission control protocol, September 1981, Status: Standard.","DOI":"10.17487\/rfc0793"},{"issue":"1","key":"10.1016\/j.sysarc.2014.10.003_b0015","article-title":"System-scenario-based design of dynamic embedded systems","volume":"14","author":"Gheorghita","year":"2009","journal-title":"ACM Trans. Des. Autom. Electr. Syst."},{"issue":"3","key":"10.1016\/j.sysarc.2014.10.003_b0020","doi-asserted-by":"crossref","first-page":"8","DOI":"10.1145\/1031382.809309","article-title":"On the foundations of artificial workload design","volume":"12","author":"Ferrari","year":"1984","journal-title":"SIGMETRICS Perform. Eval. Rev."},{"key":"10.1016\/j.sysarc.2014.10.003_b0025","series-title":"Proc. of MASCOTS","first-page":"8","article-title":"Workload modeling for parallel processing systems","author":"Haring","year":"1995"},{"key":"10.1016\/j.sysarc.2014.10.003_b0030","series-title":"Job Scheduling Strategies for Parallel Processing","author":"Minh","year":"2009"},{"key":"10.1016\/j.sysarc.2014.10.003_b0035","unstructured":"D.G. Feitelson, Workload Modeling for Computer Systems Performance Evaluation, Online, 2012, ."},{"key":"10.1016\/j.sysarc.2014.10.003_b0040","series-title":"Proc. of IPDS","first-page":"256","article-title":"An analysis of impact of workload fluctuations on performance of computer systems","author":"Li","year":"1995"},{"key":"10.1016\/j.sysarc.2014.10.003_b0045","series-title":"Proc. of JSSPP","first-page":"47","article-title":"Parallel computer workload modeling with Markov chains","author":"Song","year":"2005"},{"key":"10.1016\/j.sysarc.2014.10.003_b0050","series-title":"Proc. of MIXDES","first-page":"381","article-title":"Effective supervisors for predictive methods of dynamic power management","author":"Golda","year":"2007"},{"key":"10.1016\/j.sysarc.2014.10.003_b0055","series-title":"Proc. of SOSP","first-page":"89","article-title":"Real-time dynamic voltage scaling for low-power embedded operating systems","author":"Pillai","year":"2001"},{"key":"10.1016\/j.sysarc.2014.10.003_b0060","series-title":"Proc. of CASES","first-page":"238","article-title":"Process cruise control: event-driven clock scaling for dynamic power management","author":"Weissel","year":"2002"},{"key":"10.1016\/j.sysarc.2014.10.003_b0065","doi-asserted-by":"crossref","unstructured":"D. Rajan, R. Zuck, C. Poellabauer, Workload-aware dual-speed dynamic voltage scaling, in: Proc. of RTCSA, 2006, pp. 251\u2013256.","DOI":"10.1109\/RTCSA.2006.64"},{"issue":"9","key":"10.1016\/j.sysarc.2014.10.003_b0070","doi-asserted-by":"crossref","first-page":"1334","DOI":"10.1109\/TCAD.2009.2024706","article-title":"Run-time adaptive workload estimation for dynamic voltage scaling","volume":"28","author":"Bang","year":"2009","journal-title":"Trans. Comput. Aided Des. Integr. Circuits Syst."},{"key":"10.1016\/j.sysarc.2014.10.003_b0075","series-title":"Proc. of PCM","first-page":"94","article-title":"Dynamic voltage scaling for real-time scheduling of multimedia tasks","author":"Seong","year":"2005"},{"key":"10.1016\/j.sysarc.2014.10.003_b0080","series-title":"Proc. of ASP-DAC","first-page":"911","article-title":"Workload prediction and dynamic voltage scaling for MPEG decoding","author":"Tan","year":"2006"},{"issue":"1","key":"10.1016\/j.sysarc.2014.10.003_b0085","doi-asserted-by":"crossref","first-page":"45","DOI":"10.1007\/s11265-007-0098-x","article-title":"A dynamic voltage scaling algorithm for dynamic workloads","volume":"52","author":"Cheng","year":"2008","journal-title":"J. Signal Process. Syst."},{"key":"10.1016\/j.sysarc.2014.10.003_b0090","first-page":"165","article-title":"Models of computation for networks on chip","volume":"vol. 6","author":"Jantsch","year":"2006"},{"key":"10.1016\/j.sysarc.2014.10.003_b0095","series-title":"Proc. of DAC","first-page":"667","article-title":"Addressing the system-on-a-chip interconnect woes through communication-based design","author":"Sgroi","year":"2001"},{"key":"10.1016\/j.sysarc.2014.10.003_b0100","doi-asserted-by":"crossref","unstructured":"C. Wang, W.-H. Hu, N. Bagherzadeh, A wireless network-on-chip design for multicore platforms, in: Proc. of PDP, 2011, pp. 409\u2013416.","DOI":"10.1109\/PDP.2011.37"},{"key":"10.1016\/j.sysarc.2014.10.003_b0105","series-title":"Exploring Complexity","author":"Nicolis","year":"1989"},{"issue":"5\u20136","key":"10.1016\/j.sysarc.2014.10.003_b0110","doi-asserted-by":"crossref","first-page":"513","DOI":"10.1016\/j.pss.2003.06.009","article-title":"Evidence for chaotic dynamics in the Jovian magnetosphere","volume":"52","author":"Pavlos","year":"2004","journal-title":"Planet. Space Sci."},{"key":"10.1016\/j.sysarc.2014.10.003_b0115","series-title":"Order Within Chaos: Towards a Deterministic Approach to Turbulence","author":"Berg\u00e9","year":"1986"},{"issue":"1","key":"10.1016\/j.sysarc.2014.10.003_b0120","doi-asserted-by":"crossref","first-page":"333","DOI":"10.1103\/RevModPhys.81.333","article-title":"Fractal structures in nonlinear dynamics","volume":"81","author":"Aguirre","year":"2009","journal-title":"Rev. Mod. Phys."},{"key":"10.1016\/j.sysarc.2014.10.003_b0125","series-title":"A Practical Approach to Microarray Data Analysis","first-page":"91","article-title":"Singular value decomposition and principal component analysis","author":"Wall","year":"2004"},{"key":"10.1016\/j.sysarc.2014.10.003_b0130","first-page":"366","article-title":"Detecting strange attractors in turbulence, dynamical systems and turbulence","volume":"1981","author":"Takens","year":"1980","journal-title":"Warwick"},{"key":"10.1016\/j.sysarc.2014.10.003_b0135","series-title":"Fractals and Chaos","year":"1991"},{"key":"10.1016\/j.sysarc.2014.10.003_b0140","doi-asserted-by":"crossref","first-page":"1181","DOI":"10.1063\/1.873927","article-title":"The Hurst exponent and long-time correlation","volume":"7","author":"Wang","year":"2000","journal-title":"Phys. Plasmas"},{"issue":"3","key":"10.1016\/j.sysarc.2014.10.003_b0145","doi-asserted-by":"crossref","first-page":"285","DOI":"10.1016\/0167-2789(85)90011-9","article-title":"Determining Lyapunov exponents from a time series","volume":"16","author":"Wolf","year":"1985","journal-title":"Physica D: Nonlinear Phenom."},{"key":"10.1016\/j.sysarc.2014.10.003_b0150","doi-asserted-by":"crossref","first-page":"1493","DOI":"10.1007\/s11071-012-0364-8","article-title":"Estimation of Lyapunov exponents from a time series for n-dimensional state space using nonlinear mapping","volume":"69","author":"Yang","year":"2012","journal-title":"Nonlinear Dyn."},{"key":"10.1016\/j.sysarc.2014.10.003_b0155","series-title":"Using Surrogate Data to Detect Nonlinearity in Time Series","author":"Theiler","year":"1992"},{"key":"10.1016\/j.sysarc.2014.10.003_b0160","series-title":"Diagnosis of Process Nonlinearities and Valve Stiction, Advances in Industrial Control","first-page":"93","article-title":"A nonlinearity measure based on surrogate data analysis","author":"Choudhury","year":"2008"},{"key":"10.1016\/j.sysarc.2014.10.003_b0165","series-title":"Proc. of MobiCom","article-title":"The changing usage of a mature campus-wide wireless network","author":"Henderson","year":"2004"},{"key":"10.1016\/j.sysarc.2014.10.003_b0170","series-title":"Proc. of ASP-DAC","first-page":"434","article-title":"Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata information","author":"Bartzas","year":"2008"},{"key":"10.1016\/j.sysarc.2014.10.003_b0175","doi-asserted-by":"crossref","unstructured":"S. Kumar, A. Jantsch, J.-P. Soininen, M. Forsell, M. Millberg, J. Oberg, K. Tiensyrja, A. Hemani, A network on chip architecture and design methodology, in: Proc. of ISVLSI, 2002, pp. 105\u2013112, http:\/\/dx.doi.org\/10.1109\/ISVLSI.2002.1016885.","DOI":"10.1109\/ISVLSI.2002.1016885"},{"key":"10.1016\/j.sysarc.2014.10.003_b0180","doi-asserted-by":"crossref","unstructured":"M. Millberg, E. Nilsson, R. Thid, S. Kumar, A. Jantsch, The Nostrum backbone-a communication protocol stack for networks on chip backbone-a communication protocol stack for networks on chip, in: Proc. of VLSI Design, 2004, pp. 693\u2013696, http:\/\/dx.doi.org\/10.1109\/ICVD.2004.1261005.","DOI":"10.1109\/ICVD.2004.1261005"},{"key":"10.1016\/j.sysarc.2014.10.003_b0185","doi-asserted-by":"crossref","unstructured":"G. Liang, A. Jantsch, Adaptive power management for the on-chip communication network, in: Proc. of DSD, 2006, pp. 649\u2013656, http:\/\/dx.doi.org\/10.1109\/DSD.2006.21.","DOI":"10.1109\/DSD.2006.21"},{"key":"10.1016\/j.sysarc.2014.10.003_b0190","doi-asserted-by":"crossref","unstructured":"F. Steenhof, H. Duque, B. Nilsson, K. Goossens, R. Llopis, Networks on chips for high-end consumer-electronics TV system architectures, in: Design, Automation and Test in Europe, 2006. DATE \u201906. Proceedings, vol. 2, 2006, pp. 1\u20136.","DOI":"10.1109\/DATE.2006.243840"},{"key":"10.1016\/j.sysarc.2014.10.003_b0195","series-title":"Designing Reliable and Efficient Networks on Chips","volume":"vol. 34","author":"Murali","year":"2009"},{"key":"10.1016\/j.sysarc.2014.10.003_b0200","doi-asserted-by":"crossref","unstructured":"A. Mineo, M. Palesi, G. Ascia, V. Catania, NoC links energy reduction through link voltage scaling, in: 2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013, pp. 113\u2013120.","DOI":"10.1109\/SAMOS.2013.6621113"},{"key":"10.1016\/j.sysarc.2014.10.003_b0205","doi-asserted-by":"crossref","unstructured":"A. Pullini, F. Angiolini, P. Meloni, D. Atienza, S. Murali, L. Raffo, G. De Micheli, L. Benini, NoC design and implementation in 65nm technology, in: First International Symposium on Networks-on-Chip, 2007. NOCS 2007, 2007, pp. 273\u2013282.","DOI":"10.1109\/NOCS.2007.30"}],"container-title":["Journal of Systems Architecture"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1383762114001313?httpAccept=text\/xml","content-type":"text\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/api.elsevier.com\/content\/article\/PII:S1383762114001313?httpAccept=text\/plain","content-type":"text\/plain","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2019,8,16]],"date-time":"2019-08-16T22:13:12Z","timestamp":1565993592000},"score":1,"resource":{"primary":{"URL":"https:\/\/linkinghub.elsevier.com\/retrieve\/pii\/S1383762114001313"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,1]]},"references-count":41,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2015,1]]}},"alternative-id":["S1383762114001313"],"URL":"https:\/\/doi.org\/10.1016\/j.sysarc.2014.10.003","relation":{},"ISSN":["1383-7621"],"issn-type":[{"value":"1383-7621","type":"print"}],"subject":[],"published":{"date-parts":[[2015,1]]},"assertion":[{"value":"Elsevier","name":"publisher","label":"This article is maintained by"},{"value":"Using Chaos Theory based workload analysis to perform Dynamic Frequency Scaling on MPSoCs","name":"articletitle","label":"Article Title"},{"value":"Journal of Systems Architecture","name":"journaltitle","label":"Journal Title"},{"value":"https:\/\/doi.org\/10.1016\/j.sysarc.2014.10.003","name":"articlelink","label":"CrossRef DOI link to publisher maintained version"},{"value":"article","name":"content_type","label":"Content Type"},{"value":"Copyright \u00a9 2014 Elsevier B.V. All rights reserved.","name":"copyright","label":"Copyright"}]}}