乐胖代购免代理版

{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,6,11]],"date-time":"2024-06-11T05:58:46Z","timestamp":1718085526477},"reference-count":38,"publisher":"Springer Science and Business Media LLC","issue":"2","license":[{"start":{"date-parts":[[2014,2,4]],"date-time":"2014-02-04T00:00:00Z","timestamp":1391472000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J Supercomput"],"published-print":{"date-parts":[[2014,8]]},"DOI":"10.1007\/s11227-014-1113-1","type":"journal-article","created":{"date-parts":[[2014,2,3]],"date-time":"2014-02-03T18:52:54Z","timestamp":1391453574000},"page":"714-738","source":"Crossref","is-referenced-by-count":9,"title":["An augmented Lagrangian method for VLSI global placement"],"prefix":"10.1007","volume":"69","author":[{"given":"Wenxing","family":"Zhu","sequence":"first","affiliation":[]},{"given":"Jianli","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Weiguo","family":"Li","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2014,2,4]]},"reference":[{"key":"1113_CR1","doi-asserted-by":"crossref","unstructured":"Alpert CJ, Mehta DP (2008) Handbook of algorithm for physical design automation. Auerbach Publications, New York, pp 277\u2013284","DOI":"10.1201\/9781420013481"},{"key":"1113_CR2","unstructured":"Chu C (2008) Chapter 11: placement in electronic design automation: synthesis, verification, and testing. In: Wang LT, Chang YW, Cheng KT (eds) Elsevier, Morgan Kaufmann"},{"key":"1113_CR3","unstructured":"Garey MR, Johnson DS (1979) Computers and intractability: a guide to the theory of NP-Completeness. W. H, Freeman and Company, NY"},{"key":"1113_CR4","doi-asserted-by":"crossref","unstructured":"Donath WE (1980) Complexity theory and design automation. In: ACM\/IEEE design automation conference, pp 412\u2013419","DOI":"10.1145\/800139.804563"},{"key":"1113_CR5","doi-asserted-by":"crossref","unstructured":"Nam GJ, Cong J (2007) Modern circuit placement: best practices and results. Springer, New York","DOI":"10.1007\/978-0-387-68739-1"},{"key":"1113_CR6","doi-asserted-by":"crossref","first-page":"145","DOI":"10.2197\/ipsjtsldm.2.145","volume":"2","author":"YW Chang","year":"2009","unstructured":"Chang YW, Jiang ZW, Chen TC (2009) Essential issues in analytical placement algorithms. IPSJ Trans Syst LSI Des Methodol 2:145\u2013166","journal-title":"IPSJ Trans Syst LSI Des Methodol"},{"key":"1113_CR7","unstructured":"Sechen C, Sangiovanni-Vincentelli AL (1986) Timberwolf 3.2: a new standard cell placement and global routing package. In: Proceedings ACM\/IEEE design automation conference. pp 432\u2013439"},{"key":"1113_CR8","unstructured":"Wang M, Yang X, Sarrafzadeh M (2000) Dragon 2000: standard-cell placement tool for large industry circuits. In: Proceedings IEEE\/ACM international conference on computer-aided design. pp 260\u2013263"},{"key":"1113_CR9","unstructured":"Taghavi T, Yang X, Choi BK (2005) Dragon 2005: large-scale mixed-size placement toll. In: Proceedings IEEE\/ACM international conference on computer-aided design. pp 212\u2013217"},{"key":"1113_CR10","doi-asserted-by":"crossref","unstructured":"Chen J, Zhu WX, Ali MM (2011) A hybrid simulated annealing algorithm for nonslicing VLSI floorplanning. IEEE Trans Syst Man Cybern Part C Appl Rev 41(4):544\u2013553","DOI":"10.1109\/TSMCC.2010.2066560"},{"key":"1113_CR11","doi-asserted-by":"crossref","unstructured":"Caldwell AE, Kahng AB, Markov IL (2000) Can recursive bisection produce routable placements. In: Proceedings IEEE\/ACM international conference on computer-aided design. pp 477\u2013482","DOI":"10.1145\/337292.337549"},{"key":"1113_CR12","doi-asserted-by":"crossref","unstructured":"Roy JA, Papa DA, Adya SN, Chan HH, Ng AN, Lu JF, Markov IL (2005) Capo: robust and scalable open-source min-cut floorplacer. In Proceedings international symposium on physical design. pp 224\u2013226","DOI":"10.1145\/1055137.1055184"},{"key":"1113_CR13","unstructured":"Agnihotri AR, Ono S, Li C, Yildiz MC, Khatkhate A, Koh CK, Madden PH (2005) Recursive bisection placement: feng shui 5.0 implementation detail. In: Proceedings international symposium on physical sesign. pp 230\u2013232"},{"key":"1113_CR14","doi-asserted-by":"crossref","unstructured":"Roy JA, Adya SN, Papa DA, Markov IL (2006) Min-cut floorplacement. IEEE Trans Comput Aided Des Integr Circuits Syst 25(7):1313\u20131326","DOI":"10.1109\/TCAD.2005.855969"},{"key":"1113_CR15","doi-asserted-by":"crossref","unstructured":"Caldwell AE, Kahng AB, Markov IL (2000) Design and implementation of move-based heuristics for VLSI hypergraph partitioning. ACM J Exp Algorithm 5","DOI":"10.1145\/351827.384247"},{"key":"1113_CR16","doi-asserted-by":"crossref","unstructured":"Karypis G, Aggarwal R, Kumar V, Shekhar S (1997) Multilevel hypergraph partitioning: applications in VLSI domain. In: Proceedings Asia and South Pacific design automation conference. pp 526\u2013529","DOI":"10.1109\/DAC.1997.597203"},{"key":"1113_CR17","unstructured":"Luo T, Pan DZ (2008) Dplace2.0: a stable and efficient analytical placement based on diffusion. In: Proceedings Asia and South Pacific design automation conference. pp 346\u2013351"},{"key":"1113_CR18","unstructured":"Viswanathan N, Pan M, Chu C (2007) Fastplace 3.0: a fast multilevel quadratic placement algorithm with placement congestion control. In: Proceedings Asia and South Pacific design automation conference. pp 135\u2013140"},{"key":"1113_CR19","unstructured":"Kahng AB, Wang Q (2006) A faster implementation of APlace. In: Proceedings international symposium on physical design. pp 218\u2013220"},{"key":"1113_CR20","unstructured":"Spindler P, Johannes FM (2006) Fast and robust quadratic placement combined with an exact linear net model. In: Proceeding IEEE\/ACM international conference on computer-aided design. pp 179\u2013186"},{"key":"1113_CR21","doi-asserted-by":"crossref","unstructured":"Chan T, Cong J, Shinnerl J, Sze K, Xie M (2006) mPL6: Enhanced multilevel mixed-sized placement. In: Proceedings international symposium on physical design. pp 212\u2013214","DOI":"10.1145\/1123008.1123055"},{"key":"1113_CR22","unstructured":"Chen TC, Jiang ZW, Hsu TC, Chen HC, Chang YW (2006) A high-quality mixed-size analytical placer considering preplaced blocks and density constraints. In: Proceedings IEEE\/ACM international conference on computer-aided design. pp 187\u2013192"},{"key":"1113_CR23","doi-asserted-by":"crossref","unstructured":"Spindler P, Schlichtmann U, Johannes FM (2008) Kraftwerk2- a fast force-directed quadratic placement approach using an accurate net model. IEEE Trans Comput Aided Des Integr Circuits Syst 27(8):1389\u20131411","DOI":"10.1109\/TCAD.2008.925783"},{"key":"1113_CR24","doi-asserted-by":"crossref","unstructured":"Chen TC, Jiang ZW, Hsu TC, Chen HC, Chang YW (2008) NTUplace3: an analytical placer for large-scale mixed-size design with preplaced blocks and density constraints. IEEE Trans Comput Aided Des Integr Circuits Syst 27(7):1228\u20131240","DOI":"10.1109\/TCAD.2008.923063"},{"key":"1113_CR25","doi-asserted-by":"crossref","unstructured":"Chen J, Zhu W (2012) An analytical placer for VLSI standard cell placement. IEEE Trans Comput Aided Des Integr Circuits Syst 31(8):1208\u20131221","DOI":"10.1109\/TCAD.2012.2190289"},{"key":"1113_CR26","doi-asserted-by":"crossref","unstructured":"Viswanathan N, Nam GJ, Alpert CJ, Villarrubia P, Ren H, Chu C (2007) RQL: global placement via relaxed quadratic spreading and linearization. In: Proceedings ACM\/IEEE design automation conference. pp 453\u2013458","DOI":"10.1145\/1278480.1278599"},{"key":"1113_CR27","doi-asserted-by":"crossref","unstructured":"Kim MC, Lee DJ, Markov IL (2012) SimPL: an effective placement algorithm. IEEE Trans Comput Aided Des Integr Circuits Syst 31(1):50\u201360","DOI":"10.1109\/TCAD.2011.2170567"},{"key":"1113_CR28","unstructured":"Kim MC, Markov IL (2012) ComPLx: a competitive primal-dual Lagrange optimization for global placement. In: Proceedings ACM\/IEEE design automation conference. pp 747\u2013752"},{"key":"1113_CR29","doi-asserted-by":"crossref","unstructured":"Kim MC, Viswanathan N, Alpert CJ, Markov IL, Ramji S (2012) MAPLE: multilevel adaptive placement for mixed-size designs. In: Proceedings international symposium on physical design. pp 193\u2013200","DOI":"10.1145\/2160916.2160958"},{"key":"1113_CR30","doi-asserted-by":"crossref","unstructured":"Li C, Xie M, Koh CK, Cong J, Madden PH (2007) Recursive function smoothing of half-perimeter wirelength for analytical placement. In: Proceedings international symposium on physical design. pp 26\u201328","DOI":"10.1109\/ISQED.2007.133"},{"key":"1113_CR31","doi-asserted-by":"crossref","unstructured":"Markov IL, Hu J, Kim MC (2012) Progress and challenges in VLSI placement research. In: Proceedings IEEE\/ACM international conference on computer-aided design. pp 275\u2013282","DOI":"10.1145\/2429384.2429441"},{"key":"1113_CR32","unstructured":"ISPD (2006) Placement contest. http:\/\/archive.sigda.org\/ispd2006\/contest.html"},{"key":"1113_CR33","unstructured":"ISPD (2011) Routability-driven placement contest. http:\/\/www.ispd.cc\/contests\/11\/ispd2011_contest.html"},{"key":"1113_CR34","unstructured":"DAC (2012) Routability-driven placement contest. http:\/\/archive.sigda.org\/dac2012\/contest\/dac2012_contest.html"},{"issue":"5","key":"1113_CR35","doi-asserted-by":"crossref","first-page":"303","DOI":"10.1007\/BF00927673","volume":"4","author":"MR Hestenes","year":"1969","unstructured":"Hestenes MR (1969) Survey paper: multiplier and gradient methods. J Optim Theory Appl 4(5):303\u2013320","journal-title":"J Optim Theory Appl"},{"key":"1113_CR36","unstructured":"Naylor WC, Donelly R, Sha L (2001) US patent 6,301,693: Nonlinear optimization system and method for wire length and delay optimization for an automatic electric circuit placer"},{"issue":"2","key":"1113_CR37","doi-asserted-by":"crossref","first-page":"337","DOI":"10.1023\/A:1004603514434","volume":"106","author":"BS He","year":"2000","unstructured":"He BS, Yang H, Wang SL (2000) Alternating direction method with self-adaptive penalty parameters for monotone variational inequalities. J Optim Theory Appl 106(2):337\u2013356","journal-title":"J Optim Theory Appl"},{"key":"1113_CR38","doi-asserted-by":"crossref","unstructured":"Chan T, Cong J, Sze K (2005) Multilevel generalized force-directed method for circuit placement. In: Proceedings international symposium on physical design. pp 185\u2013192","DOI":"10.1145\/1055137.1055177"}],"container-title":["The Journal of Supercomputing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-014-1113-1.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s11227-014-1113-1\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s11227-014-1113-1","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T08:25:39Z","timestamp":1565166339000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s11227-014-1113-1"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,2,4]]},"references-count":38,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2014,8]]}},"alternative-id":["1113"],"URL":"https:\/\/doi.org\/10.1007\/s11227-014-1113-1","relation":{},"ISSN":["0920-8542","1573-0484"],"issn-type":[{"value":"0920-8542","type":"print"},{"value":"1573-0484","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,2,4]]}}}