{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,10,15]],"date-time":"2022-10-15T08:51:35Z","timestamp":1665823895570},"reference-count":17,"publisher":"Springer Science and Business Media LLC","issue":"11","license":[{"start":{"date-parts":[[2014,8,3]],"date-time":"2014-08-03T00:00:00Z","timestamp":1407024000000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":["Computing"],"published-print":{"date-parts":[[2014,11]]},"DOI":"10.1007\/s00607-014-0420-y","type":"journal-article","created":{"date-parts":[[2014,8,2]],"date-time":"2014-08-02T07:33:34Z","timestamp":1406964814000},"page":"1087-1110","update-policy":"http:\/\/dx.doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":6,"title":["Improved scheduler for multi-core many-core systems"],"prefix":"10.1007","volume":"96","author":[{"given":"Neetesh","family":"Kumar","sequence":"first","affiliation":[]},{"given":"Deo Prakash","family":"Vidyarthi","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2014,8,3]]},"reference":[{"key":"420_CR1","unstructured":"Kyriazis G (2012) Heterogeneous system architecture: a technical review. AMD Rev 1.0, 30 Aug 2012"},{"key":"420_CR2","doi-asserted-by":"crossref","unstructured":"Bajaj R, Agrawal DP (2004) Improving scheduling of tasks in a heterogeneous environment. IEEE Trans Parallel Distrib Computi 15(2):107\u2013118","DOI":"10.1109\/TPDS.2004.1264795"},{"key":"420_CR3","doi-asserted-by":"crossref","first-page":"353","DOI":"10.1016\/j.jpdc.2011.12.005","volume":"72","author":"P Nie","year":"2012","unstructured":"Nie P, Duan Z (2012) Efficient and scalable scheduling for performance heterogeneous multicore systems. J. Parallel Distrib. Comput. 72:353\u2013361","journal-title":"J. Parallel Distrib. Comput."},{"key":"420_CR4","volume-title":"Advance computer architecture, parallelism, scalability, programmability","author":"Kai Hwang","year":"2008","unstructured":"Hwang Kai (2008) Advance computer architecture, parallelism, scalability, programmability. Tata Mc-Graw Hill Edition Inc., New York"},{"key":"420_CR5","unstructured":"Hennessy JL, Patterson DA, Arpaci-Dusseau AC (2007) Computer architecture: a quantitative approach, vol 1. Morgan Kaufmann, Burlington"},{"key":"420_CR6","doi-asserted-by":"crossref","unstructured":"Balakrishnan S, Rajwar R, Upton M, Lai K (2005) The impact of performance asymmetry in emerging multicore architectures. In: Proceedings of the 32nd international symposium on computer architecture (ISCA05), pp 506\u2013517","DOI":"10.1109\/ISCA.2005.51"},{"key":"420_CR7","unstructured":"Becchi M, Crowley P (2005) Dynamic thread assignment on heterogeneous multicore architectures. In: Proceedings of the 32nd Annual International Symposium on Computer Architecture (ISCA\u201905), pp 29\u201340"},{"key":"420_CR8","doi-asserted-by":"crossref","unstructured":"Kumar R, Tullsen DM, Jouppi NP, Ranganathan P (2005) Heterogeneous chip multicores. Computer pp 32\u201338","DOI":"10.1109\/MC.2005.379"},{"key":"420_CR9","doi-asserted-by":"crossref","unstructured":"Li T, Baumberger D, Koufaty DA, Hahn S (2007) Efficient operating system scheduling for performance-asymmetric multi-core architectures. In: Proceedings of the 2007 ACM\/IEEE conference on supercomputing (SC\u201907)","DOI":"10.1145\/1362622.1362694"},{"key":"420_CR10","doi-asserted-by":"crossref","first-page":"66","DOI":"10.1145\/1531793.1531804","volume":"43","author":"D Shelepov","year":"2009","unstructured":"Shelepov D, Saez JC, Jeffery S, Fedorova A, Perez N, Huang ZF, Blagodurov S, Kumar V (2009) HASS: a scheduler for heterogeneous multicore systems. Oper Syst Rev 43:66\u201375","journal-title":"Oper Syst Rev"},{"key":"420_CR11","unstructured":"Teodorescu R, Torrellas J (2008) Variation-aware application scheduling and power management for chip multicores. In: Proceedings of the 35th international symposium on computer architecture (ISCA\u201908), pp 363\u2013374"},{"key":"420_CR12","unstructured":"Fog A (2012) Lists of instruction latencies, throughputs and micro-operation breakdowns for Intel, AMD and VIA CPUs. Copenhagen University College of Engineering, 1996\u20132012. Last updated 2012\u201302-29. http:\/\/www.agner.org\/optimize\/instruction_tables . Accessed 15 Nov 2012"},{"key":"420_CR13","unstructured":"Shelepov D, Fedorova A (2008) Scheduling on heterogeneous multicore cores using architectural signatures. In: Proceedings of the workshop on the interaction between operating systems and computer architecture, in conjunction with the 35th international symposium on computer architecture (WIOSCA\u201908). http:\/\/www.ideal.ece.ufl.edu\/workshops\/wiosca08 . Accessed 15 Oct 2012"},{"key":"420_CR14","doi-asserted-by":"crossref","unstructured":"Van Craeynest K, Jaleel A, Eeckhout L, Narvaez P, Emer J Scheduling heterogeneous multi-cores through performance impact estimation (PIE). In: Proceedings of the 39th annual international symposium on computer architecture (ISCA \u201912), pp 213\u2013224","DOI":"10.1145\/2366231.2337184"},{"key":"420_CR15","doi-asserted-by":"crossref","unstructured":"Kumar R, Tullsen DM, Ranganathan P, Jouppi NP, Farkas KI (2004) Single- ISA heterogeneous multi-core architectures for multithreaded workload performance. In: Proceedings of the 31st annual international symposium on computer architecture (ISCA\u201904), pp 64\u201375","DOI":"10.1145\/1028176.1006707"},{"key":"420_CR16","unstructured":"http:\/\/andrewjpage.com\/index.php?\/archives\/14-Speedup-metric-and-heterogeneous-distributed-systems.html . Accessed 12 Nov 2012"},{"key":"420_CR17","unstructured":"http:\/\/en.wikipedia.org\/wiki\/Matrix_chain_multiplication . Accessed 15 Jun 2013"}],"container-title":["Computing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00607-014-0420-y.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/article\/10.1007\/s00607-014-0420-y\/fulltext.html","content-type":"text\/html","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/s00607-014-0420-y","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,13]],"date-time":"2019-08-13T13:54:52Z","timestamp":1565704492000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/s00607-014-0420-y"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,8,3]]},"references-count":17,"journal-issue":{"issue":"11","published-print":{"date-parts":[[2014,11]]}},"alternative-id":["420"],"URL":"https:\/\/doi.org\/10.1007\/s00607-014-0420-y","relation":{},"ISSN":["0010-485X","1436-5057"],"issn-type":[{"value":"0010-485X","type":"print"},{"value":"1436-5057","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,8,3]]}}}