{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T15:45:12Z","timestamp":1725551112932},"publisher-location":"Berlin, Heidelberg","reference-count":17,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540634652"},{"type":"electronic","value":"9783540695578"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1997]]},"DOI":"10.1007\/3-540-63465-7_248","type":"book-chapter","created":{"date-parts":[[2010,4,5]],"date-time":"2010-04-05T19:22:48Z","timestamp":1270495368000},"page":"428-437","source":"Crossref","is-referenced-by-count":4,"title":["PostScript\u2122 rendering with virtual hardware"],"prefix":"10.1007","author":[{"given":"Satnam","family":"Singh","sequence":"first","affiliation":[]},{"given":"John","family":"Patterson","sequence":"additional","affiliation":[]},{"given":"Jim","family":"Burns","sequence":"additional","affiliation":[]},{"given":"Michael","family":"Dales","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2005,7,29]]},"reference":[{"key":"44_CR1","unstructured":"Adobe Systems Incorporated. PostScript Language Reference Manual. Addison-Wesley, 1985."},{"key":"44_CR2","unstructured":"Adobe Systems Incorporated. Portable Document Format Reference Manual. Version 1.2. 1996."},{"issue":"l","key":"44_CR3","first-page":"301","volume":"4","author":"J. E. Bresenham","year":"1965","unstructured":"J. E. Bresenham. Algorithm for Computer Control of a Digital Plotter. IBM Systems Journal, 4(l), 1965, 301\u2013317.","journal-title":"IBM Systems Journal"},{"key":"44_CR4","doi-asserted-by":"crossref","unstructured":"J. E. Bresenham. A Linear Algorithm for Incremental Display of Circular Arcs. Communications of the ACM, 20(2). February, 1997.","DOI":"10.1145\/359423.359432"},{"key":"44_CR5","first-page":"297","volume-title":"Fast Reconfigurable Crossbar Switching in FPGAs","author":"H. Eggers","year":"1996","unstructured":"H. Eggers, P. Lysaght. H. Dick and G. McGregor, Fast Reconfigurable Crossbar Switching in FPGAs. In, R. W. Hartenstein, M. Glesner (Eds.) Field-Programmable LogicSmart Applications, New Paradigms and Compilers,Springer Verlag, Germany, 1996, pp. 297\u2013306."},{"key":"44_CR6","unstructured":"James G. Eldridge, Brad L. Hutchings. RRANN: The Run-Time Reconfiguration Artificial Neural Network. IEEE Custom Integrated Circuits Conference. 1994."},{"key":"44_CR7","unstructured":"J. D. Hadley, B. L. Hutchings. Design Methodologies for Partially Reconfigured Systems. FCCM'95. IEEE Computer Society, 1995."},{"key":"44_CR8","unstructured":"T. Kean, B. New, B. Slous. A Multiplier for the XC6200. Sixth International Workshop on Field Programmable Logic and Applications. Darmstadt, 1996."},{"key":"44_CR9","doi-asserted-by":"crossref","unstructured":"H. T. Kung. Why Systolic Architectures. IEEE Computer. January 1982.","DOI":"10.1109\/MC.1982.1653825"},{"key":"44_CR10","unstructured":"Charles E. Leiserson. Systolic and Semisystolic Design. IEEE Conference on Computer Design\/VLSI In Computers (ICCD'83). 1983."},{"key":"44_CR11","doi-asserted-by":"crossref","unstructured":"Alex Peleg, Sam Wilkie and Uri Weiser. Intel MMX for Multimedia PCs. Communications of the ACM. Vol. 40, No. 1, January 1997.","DOI":"10.1145\/242857.242865"},{"key":"44_CR12","unstructured":"Satnam Singh and Pierre Bellec. Virtual Hardware for Graphics Applications using FPGAs. FCCM'94. IEEE Computer Society, 1994."},{"key":"44_CR13","unstructured":"Satnam Singh. Architectural Descriptions for FPGA Circuits. FCCM'95. IEEE Computer Society. 1995."},{"key":"44_CR14","unstructured":"M. Sheeran, G. Jones. Circuit Design in Ruby. Formal Methods for VLSI Design, J. Stanstrup, North Holland, 1992."},{"key":"44_CR15","unstructured":"Michael J. Wirthlin and Brad L. Hutchings. A dynamic instruction set computer. FCCM'95. IEEE Computer Society. 1995."},{"key":"44_CR16","unstructured":"Michael J. Wirthlin, Brad L. Hutchings. Improving functional density through run-time constant propagation. To be published in FPGA'97."},{"key":"44_CR17","unstructured":"Xilinx. XC6200 FPGA Family Data Sheet. Xilinx Inc. 1995."}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic and Applications"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-63465-7_248","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,28]],"date-time":"2019-05-28T00:18:34Z","timestamp":1559002714000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-63465-7_248"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1997]]},"ISBN":["9783540634652","9783540695578"],"references-count":17,"URL":"https:\/\/doi.org\/10.1007\/3-540-63465-7_248","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1997]]}}}