{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T12:52:14Z","timestamp":1725627134281},"publisher-location":"Berlin, Heidelberg","reference-count":19,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540678991"},{"type":"electronic","value":"9783540446149"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2000]]},"DOI":"10.1007\/3-540-44614-1_42","type":"book-chapter","created":{"date-parts":[[2007,10,20]],"date-time":"2007-10-20T13:25:22Z","timestamp":1192886722000},"page":"389-399","source":"Crossref","is-referenced-by-count":7,"title":["Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures"],"prefix":"10.1007","author":[{"given":"R.","family":"Hartenstein","sequence":"first","affiliation":[]},{"given":"M.","family":"Herz","sequence":"additional","affiliation":[]},{"given":"Th.","family":"Hoffmann","sequence":"additional","affiliation":[]},{"given":"U.","family":"Nageldinger","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2002,4,12]]},"reference":[{"key":"42_CR1","doi-asserted-by":"publisher","first-page":"157","DOI":"10.1109\/FPGA.1996.564808","volume-title":"Proc. FPGAs for Custom Computing Machines","author":"E. Mirsky","year":"1996","unstructured":"E. Mirsky, A. DeHon: \u201cMATRIX: A Reconfigurable Computing Architecture with Configurable Instruction Distribution and Deployable Resources\u201d, Proc. FPGAs for Custom Computing Machines, pp. 157\u2013166, IEEE CS Press, Los Alamitos, CA, U.S.A., 1996."},{"key":"42_CR2","doi-asserted-by":"crossref","unstructured":"A. Marshall et al.: A Reconfigurable Arithmetic Array for Multimedia Applications; FPGA\u201999, Int\u2019l Symposium on Field Programmable Gate Arrays, Monterey, CA, U.S.A., Febr. 21\u201323, 1999","DOI":"10.1145\/296399.296444"},{"key":"42_CR3","doi-asserted-by":"crossref","unstructured":"C. Ebeling, D. Cronquist, P. Franklin: \u201cRaPiD: Reconfigurable Pipelined Datapath\u201d, Int\u2019l Workshop on Field Programmable Logic and Applications, FPL\u201996, Darmstadt, Germany, Sept 1996.","DOI":"10.1007\/3-540-61730-2_13"},{"key":"42_CR4","doi-asserted-by":"crossref","unstructured":"R. A. Bittner, P. M. Athanas and M. D. Musgrove: \u201cColt: An Experiment in Wormhole Run-time Reconfiguration\u201d; SPIE Photonics East\u2019 96, Boston, MA, USA, November 1996.","DOI":"10.1117\/12.255815"},{"key":"42_CR5","unstructured":"R. Kress: \u201cA Fast Reconfigurable ALUs for Xputers\u201d, Ph.D. thesis, Univ. Kaiserslautern, 1996."},{"key":"42_CR6","doi-asserted-by":"crossref","unstructured":"E. Waingold et al.: \u201cBaring it all to Software: Raw Machines\u201d, IEEE Computer 30, pp. 86\u201393.","DOI":"10.1109\/2.612254"},{"key":"42_CR7","doi-asserted-by":"crossref","unstructured":"S. C. Goldstein, H. Schmit, et al.: \u201cPipeRench: A Coprocessor for Streaming Multimedia Acceleration\u201d; Int\u2019l Symposium on Computer Architecture 1999, Atlanta, GA, USA, May 1999.","DOI":"10.1145\/307338.300982"},{"key":"42_CR8","doi-asserted-by":"crossref","unstructured":"J. Rabaey. \u201cLow-Power Silicon Architectures for Wireless Communications\u201d; Embedded Tutorial, ASP-DAC 2000, Yokohama, Japan, Jan. 2000","DOI":"10.1145\/368434.368691"},{"key":"42_CR9","unstructured":"R Hartenstein: \u201cMikroprozessor im Neuen Jahrtausend\u201d; Elektronik, Januar 1000"},{"key":"42_CR10","unstructured":"R. Hartenstein (invited paper): The Microprocessor is no more General Purpose: why Future Reconfigurable Platforms will win; Int\u2019l Conf. on Innovative Systems in Silicon, ISIS\u201997, Austin, Texas, USA, Oct 1997"},{"key":"42_CR11","doi-asserted-by":"crossref","unstructured":"R. Hartenstein, M. Herz, Th. Hoffmann, U. Nageldinger: \u201cMapping Applications onto Reconfigurable KressArrays\u201d; International Workshop on Field Programmable Logic and Applications, FPL\u201999, Glasgow, Scotland, August\/September 1999.","DOI":"10.1007\/978-3-540-48302-1_42"},{"key":"42_CR12","doi-asserted-by":"crossref","unstructured":"R. Hartenstein, M. Herz, Th. Hoffmann, U. Nageldinger: \u201cSynthesis and Domain-specific Optimization of KressArray-based Reconfigurable Computing Engines\u201d, Asia and South Pacific Design Automation Conference, ASP-DAC 2000, Yokohama, Japan, January 2000.","DOI":"10.1145\/329166.329224"},{"key":"42_CR13","unstructured":"R. Kress et al.: \u201cA Datapath Synthesis System for the Reconfigurable Datapath Architecture\u201d; Asia and South Pacific Design Automation Conference, ASP-DAC\u201995, Makuhari, Chiba, Japan, August 29\u2013September 1, 1995."},{"key":"42_CR14","unstructured":"R. Hartenstein: \u201cReconfigurable Computing\u201d; HighSys\u2019 99, Sindelfingen, Germany, Oct. 1999"},{"key":"42_CR15","unstructured":"C. A. Moritz, D. Yeung, A. Agarwal: \u201cExploring Optimal Cost-Performance Designs for Raw Microprocessors\u201d; Int\u2019l symposium on FPGAs for Custom Computing Machines, FCCM\u201998, Napa, CA, April 1998."},{"key":"42_CR16","doi-asserted-by":"crossref","unstructured":"L. Guerra, M. Potkonjak and J. Rabaey: \u201cA Methodology for Guided Behavioral-Level Optimization\u201d; Proceedings of the 35th Design Automation Conference 1998 (DAC\u201998), June 15\u201319, 1998, San Francisco, CA, USA.","DOI":"10.1145\/277044.277134"},{"key":"42_CR17","doi-asserted-by":"crossref","unstructured":"L. Guerra, M. Potkonjak and J. Rabaey: \u201cSystem-Level Design Guidance Using Algorithm Properties\u201d; IEEE VLSI Signal Processing Workshop, 1994.","DOI":"10.1109\/VLSISP.1994.574732"},{"key":"42_CR18","doi-asserted-by":"crossref","unstructured":"W. Pedrycz: \u201cFuzzy Modelling \u2014 Paradigms and Practice\u201d; Kluwer Academic Publishers, 1996.","DOI":"10.1007\/978-1-4613-1365-6"},{"key":"42_CR19","doi-asserted-by":"crossref","unstructured":"B.R. Gaines: \u201cFoundations of Fuzzy Reasoning\u201d; Int\u2019l Journal of Man-Machine Studies, Vol. 8, 1976.","DOI":"10.1016\/S0020-7373(76)80036-3"}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-44614-1_42","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,14]],"date-time":"2023-05-14T09:05:42Z","timestamp":1684055142000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-44614-1_42"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2000]]},"ISBN":["9783540678991","9783540446149"],"references-count":19,"URL":"https:\/\/doi.org\/10.1007\/3-540-44614-1_42","relation":{},"ISSN":["0302-9743"],"issn-type":[{"type":"print","value":"0302-9743"}],"subject":[],"published":{"date-parts":[[2000]]}}}