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{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,3,20]],"date-time":"2024-03-20T05:37:30Z","timestamp":1710913050044},"reference-count":46,"publisher":"Wiley","issue":"7","license":[{"start":{"date-parts":[[2021,4,7]],"date-time":"2021-04-07T00:00:00Z","timestamp":1617753600000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["Circuit Theory & Apps"],"published-print":{"date-parts":[[2021,7]]},"abstract":"Summary<\/jats:title>A dual\u2010duty digital pulse\u2010width modulation (DDPWM) technique\u2010based cost\u2010effective control hardware architecture for brushless DC (BLDC) motor drive is reported in this paper. DDPWM control technique involves reduced computational complexity, which is beneficial in on\u2010chip area and power dissipation reduction. Simple Hall sensor\u2010based speed calculation and commutation circuits were also incorporated in the hardware to reduce the chip area further. The edge detection\u2010based speed calculation circuit was designed to be tolerant of any external noise or glitch in the Hall sensor signal. The proposed hardware architecture was implemented on the field\u2010programmable gate array (FPGA) and application\u2010specific integrated circuit (ASIC) platform using TSMC 180\u2010nm technology library. The ability of the integrated circuit (IC) for resource utilization reduction was validated by comparing the FPGA\u2010implemented architecture with the existing literature. The FPGA\u2010implemented architecture was also examined in real\u2010time using an experimental prototype BLDC motor setup. The drive response with dynamic load and speed variations, speed control precision, and glitch tolerant speed calculation is reported in the paper. The ASIC implementation demonstrates that the developed architecture sampled at 50\u2009MHz is highly effective in the gate count and power dissipation reduction compared to the standard PI controller\u2010based width modulated pulse generation hardware architecture.<\/jats:p>","DOI":"10.1002\/cta.3011","type":"journal-article","created":{"date-parts":[[2021,4,7]],"date-time":"2021-04-07T12:06:10Z","timestamp":1617797170000},"page":"2183-2198","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Development of a cost\u2010effective circuit hardware architecture for brushless direct current motor driver"],"prefix":"10.1002","volume":"49","author":[{"ORCID":"http:\/\/orcid.org\/0000-0002-1786-4302","authenticated-orcid":false,"given":"Pratikanta","family":"Mishra","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering National Institute of Technology Meghalaya Shillong India"}]},{"given":"Atanu","family":"Banerjee","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering National Institute of Technology Meghalaya Shillong India"}]},{"ORCID":"http:\/\/orcid.org\/0000-0001-6477-7693","authenticated-orcid":false,"given":"Mousam","family":"Ghosh","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering Ramkrishna Mahato Government Engineering College Purulia Purulia India"}]},{"given":"Sushanta","family":"Gogoi","sequence":"additional","affiliation":[{"name":"Department of Electronics and Communication Engineering National Institute of Technology Meghalaya Shillong India"}]},{"given":"Rukmi","family":"Dutta","sequence":"additional","affiliation":[{"name":"School of Electrical Engineering and Telecommunications University of New South Wales (UNSW) Sydney New South Wales Australia"}]}],"member":"311","published-online":{"date-parts":[[2021,4,7]]},"reference":[{"issue":"1","key":"e_1_2_7_2_1","first-page":"1","article-title":"State\u2010of\u2010art on permanent magnet brushless DC motor drives","volume":"9","author":"Singh B","year":"2009","journal-title":"J Power Electron"},{"key":"e_1_2_7_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2016.2598298"},{"key":"e_1_2_7_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2017.2767553"},{"key":"e_1_2_7_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2018.2868828"},{"key":"e_1_2_7_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVT.2018.2866779"},{"key":"e_1_2_7_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/EPEPEMC.2014.6980715"},{"key":"e_1_2_7_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2016.2569611"},{"key":"e_1_2_7_9_1","doi-asserted-by":"publisher","DOI":"10.1049\/iet-epa.2017.0615"},{"key":"e_1_2_7_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIA.2017.2732341"},{"key":"e_1_2_7_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2016.2609841"},{"issue":"3","key":"e_1_2_7_12_1","first-page":"57","article-title":"Sensorless speed tracking of a brushless DC motor using a neural network","volume":"25","author":"Ram\u00edrez\u2010C\u00e1rdenas O\u2010D","year":"2020","journal-title":"Math Comput Appl"},{"key":"e_1_2_7_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2018.2794461"},{"key":"e_1_2_7_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/JESTPE.2016.2637383"},{"key":"e_1_2_7_15_1","doi-asserted-by":"publisher","DOI":"10.1002\/cta.2959"},{"key":"e_1_2_7_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.845892"},{"key":"e_1_2_7_17_1","doi-asserted-by":"publisher","DOI":"10.1002\/cta.2896"},{"key":"e_1_2_7_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/28.25542"},{"key":"e_1_2_7_19_1","doi-asserted-by":"publisher","DOI":"10.1049\/iet-pel.2018.5231"},{"key":"e_1_2_7_20_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.conengprac.2013.11.014"},{"key":"e_1_2_7_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/TTE.2016.2535411"},{"key":"e_1_2_7_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/UKSIM.2011.44"},{"key":"e_1_2_7_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIA.2015.2468191"},{"key":"e_1_2_7_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2017.2760838"},{"key":"e_1_2_7_25_1","doi-asserted-by":"publisher","DOI":"10.1007\/s40313-019-00466-x"},{"key":"e_1_2_7_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICIT.2005.1600623"},{"key":"e_1_2_7_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2013.2276776"},{"key":"e_1_2_7_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/IECON.2016.7793092"},{"key":"e_1_2_7_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2019.2922920"},{"key":"e_1_2_7_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2012.2206360"},{"key":"e_1_2_7_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2013.2253216"},{"key":"e_1_2_7_32_1","doi-asserted-by":"publisher","DOI":"10.1049\/iet-pel.2015.0919"},{"key":"e_1_2_7_33_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-020-01599-9"},{"key":"e_1_2_7_34_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.asoc.2012.08.032"},{"key":"e_1_2_7_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2017.2707639"},{"key":"e_1_2_7_36_1","doi-asserted-by":"publisher","DOI":"10.1007\/s00542-016-3248-x"},{"key":"e_1_2_7_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2008.2004671"},{"key":"e_1_2_7_38_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.2965018"},{"key":"e_1_2_7_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/370155.370356"},{"key":"e_1_2_7_40_1","doi-asserted-by":"crossref","unstructured":"BobbaS ThorpT AingaranK LiuD.IC power distribution challenges. In: IEEE\/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE\/ACM Digest of Technical Papers (Cat. No.01CH37281). IEEE;2001:643\u2013650.https:\/\/doi.org\/10.1109\/ICCAD.2001.968729","DOI":"10.1109\/ICCAD.2001.968729"},{"key":"e_1_2_7_41_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2009.2022067"},{"key":"e_1_2_7_42_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEMDC.2009.5075186"},{"key":"e_1_2_7_43_1","doi-asserted-by":"publisher","DOI":"10.1109\/EPETSG.2018.8659247"},{"key":"e_1_2_7_44_1","doi-asserted-by":"publisher","DOI":"10.1109\/TMECH.2020.2977859"},{"key":"e_1_2_7_45_1","doi-asserted-by":"publisher","DOI":"10.1109\/TMECH.2012.2226469"},{"key":"e_1_2_7_46_1","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.2018.2800750"},{"key":"e_1_2_7_47_1","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2013.2243740"}],"container-title":["International Journal of Circuit Theory and Applications"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/cta.3011","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/full-xml\/10.1002\/cta.3011","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/cta.3011","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,8,30]],"date-time":"2023-08-30T19:26:31Z","timestamp":1693423591000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/cta.3011"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,4,7]]},"references-count":46,"journal-issue":{"issue":"7","published-print":{"date-parts":[[2021,7]]}},"alternative-id":["10.1002\/cta.3011"],"URL":"https:\/\/doi.org\/10.1002\/cta.3011","archive":["Portico"],"relation":{},"ISSN":["0098-9886","1097-007X"],"issn-type":[{"value":"0098-9886","type":"print"},{"value":"1097-007X","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,4,7]]},"assertion":[{"value":"2020-12-21","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2021-03-16","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2021-04-07","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}