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TinyCPUƤܤˤʤޤץबԥ塼ưȤ
äؤVerilogHDL & FPGA߷סʣǯǯϢܡ
FPGAܡɡSpartan-3EåȡޤSpartan-3AåȡˤưCPUVerilog HDL߷פޤ
ˡCPUåȤȤ륢֥ȥѥ߷פޤ
ɤϤʤʷ˽Ƥꡤ̤ʤ꾯ʤ250١ˤˤ⤫餺ɬ¤εǽäãУդƣУǣܡɤưޤ
ɤδʷ餵˽ƤΤǡϩѤΨϽŻ뤷Ƥޤ
ġΰVerilog HDLδܹʸΤѤ뤳Ȥθɤϸ§Verilog-95˽Ƥޤ
Verilog 2001ʤɤǤǽǤ֥PerlѥflexbisonǵҤƤꡤƾʤ̤뤳ȤǤޤ
| ȥ | ||
|---|---|---|
| 裱 | ǯ | ûHDL߷פƤߤ褦 |
| 裲 | ǯ | 4ӥåȲû߷פ褦 |
| 裳 | ǯ | ޥץ쥯Ȼ黻ϩ |
| 裴 | ǯ | ϩ߷ץեåץեåפȥ |
| 裵 | ǯ | ơȥޥ߷ |
| 裶 | ǯ | å߷ |
| 裷 | ǯ | 㥿ϩLCDϩ |
| 裸 | ǯ | ʬRAMȥ֥åRAM |
| 裹 | ǯ | Х̿եåϩ |
| 裱 | ǯ | CPU߷סʣ˴ܥƥ߷ |
| 裱 | ǯ | CPU߷סʣVerilog HDLˤ뵭 |
| 裱 | ǯ | CPU߷סʣ FPGAˤưǧ |
| 裱 | ǯ | ֥߷ |
| 裱 | ǯ | ѥ߷סʣ |
| 裱 | ǯ | ѥ߷סʣ |
Ȥλ
عظʾ칶ǹԤäƤر()μȤۻ
ޤ
- ֤ͤΤۻϱѸǤ
- ƤϡTINYCPU, TINYASM, TINYC߷פԤFPGAܡ(Spartan-3AN Starter kit)Ѥưޤ
- Course Materials
CPUγά
- ʥåƥ
- ǡӥåȡɥ쥹ӥåȡʣɡ
- ݡȤ̿ᡧɡ¨ͥɡȥʬʬ(FPGAܡɾΥåϤȡLCDؤΣɽ
- ݡȤ뻻黻ø軻+-*ˡȿž-ˡӥåȥեȡ>>,<<ˡӥåȤȤ¡ѡXOR(|&^~)¡ѡ||&&!ˡ=ˡ!=ˡ羮ӡ<><=>=
- 1̿¹ԤΤ3å롥PUSH̿4åʥƱɤ߽ФԤ뤿
ɽ
٤ƤΥɤΥ饤GPL˽ΤȤޤ
Verilog HDLΥɤVerilog-95˽Ƥޤ
TINYCPUVerilogHDL
TINYCPUȤΥ⥸塼VerilogHDLҤǤ
| Ƽ | Verilog HDL | TINYCPUѤƼ |
| 黻ϩ | Verilog HDL | TINYCPUλ黻ϩʣ̣ա |
| Verilog HDL | TINYCPUΥץ५̿쥸Ѥ | |
| ơȥޥ | Verilog HDL | TINYCPUξѤ |
| å | Verilog HDL | TINYCPUΥǡåѤ |
| Verilog HDL | TINYCPUΥ(֥åRAM) | |
| TINYCPU | Verilog HDL | TINYCPU |
ղϩVerilogHDL
TINYCPUFPGAܡɡSpartan3EޤSpartan3AåȡˤưΤɬפʲϩVerilog HDLҤǤ
| 㥿ϩ | Verilog HDL | ϿΥ㥿ϩ |
| LCDϩ | Verilog HDL | LCDϩ |
| TINYCPUΥȥåײϩ | Verilog HDL | TINYCPUΥȥåײϩ |
TINYCPUΥȥåײϩѥ桼ե
TINYCPUFPGAܡɡSpartan3EޤSpartan3AåȡˤưΤɬפʥ桼եǤ
ԥơFPGAΥԥȥȥåײϩcpu_topΥݡȤбդˤޤ
| Spartan3EUCF | UCF | Spartan3EåUCF |
| Spartan3AUCF | UCF | Spartan3AåUCF |
֥ȥѥ
TINYCPUåȤȤ륢֥ȥѥ
| ֥ | Perl | TINYCPUѥ֥ tinyasm |
| Flex | TINYCPUѥѥλ tinyc.l | |
| ʸ | Bison | TINYCPUѥѥιʸ tinyc.y |
| ؤѴ | Perl | ֥ȷѴ mac2mem |
ѥˡ
ʲμǥѥtinyc
$ bison -d -y tinyc.y $ flex tinyc.l $ gcc -o tinyc lex.yy.c y.tab.c
øץΥѥ롦֥
åĤηԤץ
åĤ
nͿ줿Ȥ
- nΤȤn2dz
- nΤȤn3ݤ1
Ȥn1ˤʤޤǷ֤
åĤȤϡ֤nˤĤͭ²n1ˤʤ뤫ɤפȤ̤Ǥ
Cץ
nϤ1ˤʤޤ֤ޤ
n=in;
while(n>1){
out(n);
if(n&1){
n= n*3+1;
} else {
n = n>>1;
}
}
out(n);
halt;
int n;
ѥ
IN
POP n
_001T:
PUSH n
PUSHI 1
GT
JZ _001F
PUSH n
OUT
PUSH n
PUSHI 1
BAND
JZ _002F
PUSH n
PUSHI 3
MUL
PUSHI 1
ADD
POP n
JMP _002T
_002F:
PUSH n
PUSHI 1
SHR
POP n
_002T:
JMP _001T
_001F:
PUSH n
OUT
HALT
n: 0
֥
*** LABEL LIST ***
_001F 018
_001T 002
_002F 013
_002T 017
n 01B
*** MACHINE PROGRAM ***
000:D000 IN
001:301B POP n
_001T:
002:201B PUSH n
003:1001 PUSHI 1
004:F00E GT
005:5018 JZ _001F
006:201B PUSH n
007:E000 OUT
008:201B PUSH n
009:1001 PUSHI 1
00A:F005 BAND
00B:5013 JZ _002F
00C:201B PUSH n
00D:1003 PUSHI 3
00E:F002 MUL
00F:1001 PUSHI 1
010:F000 ADD
011:301B POP n
012:4017 JMP _002T
_002F:
013:201B PUSH n
014:1001 PUSHI 1
015:F004 SHR
016:301B POP n
_002T:
017:4002 JMP _001T
_001F:
018:201B PUSH n
019:E000 OUT
01A:0000 HALT
01B:0000 n: 0
Ѵ
mem[12'h000] = 16'hD000; // IN
mem[12'h001] = 16'h301B; // POP n
//_001T:
mem[12'h002] = 16'h201B; // PUSH n
mem[12'h003] = 16'h1001; // PUSHI 1
mem[12'h004] = 16'hF00E; // GT
mem[12'h005] = 16'h5018; // JZ _001F
mem[12'h006] = 16'h201B; // PUSH n
mem[12'h007] = 16'hE000; // OUT
mem[12'h008] = 16'h201B; // PUSH n
mem[12'h009] = 16'h1001; // PUSHI 1
mem[12'h00A] = 16'hF005; // BAND
mem[12'h00B] = 16'h5013; // JZ _002F
mem[12'h00C] = 16'h201B; // PUSH n
mem[12'h00D] = 16'h1003; // PUSHI 3
mem[12'h00E] = 16'hF002; // MUL
mem[12'h00F] = 16'h1001; // PUSHI 1
mem[12'h010] = 16'hF000; // ADD
mem[12'h011] = 16'h301B; // POP n
mem[12'h012] = 16'h4017; // JMP _002T
//_002F:
mem[12'h013] = 16'h201B; // PUSH n
mem[12'h014] = 16'h1001; // PUSHI 1
mem[12'h015] = 16'hF004; // SHR
mem[12'h016] = 16'h301B; // POP n
//_002T:
mem[12'h017] = 16'h4002; // JMP _001T
//_001F:
mem[12'h018] = 16'h201B; // PUSH n
mem[12'h019] = 16'hE000; // OUT
mem[12'h01A] = 16'h0000; // HALT
mem[12'h01B] = 16'h0000; // n: 0
®TINYCPU
- ٤Ƥ̿1åǼ¹
- TINYCPUȴߴ
- ǥ奢ݡ֥åRAM
ⵡǽMINICPU
- ®TINYCPUεǽɲä
TIPS
Publications
- Koji Nakano, Kensuke Kawakami, Koji Shigemoto, Yuki Kamada, Yasuaki Ito, A Tiny Processing System for Education and Small Embedded Systems on the FPGAs, Proc. of Embedded Software Optimization (ESO), pp. 472-479, Dec., 2008.
- Koji Nakano, Yasuaki Ito Processor, Assembler, and Compiler Design Education using an FPGA, Proc. of International Conference on Parallel and Distributed Systems (ICPADS), pp. 723-728, Dec., 2008.
LINK
- Computer Architecture by Ian McLoughlin, Nanyang Technological University
This book introduces TINYCPU.
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